參數(shù)資料
型號(hào): NC7WZ240K8X
廠商: Fairchild Semiconductor
文件頁(yè)數(shù): 8/9頁(yè)
文件大?。?/td> 0K
描述: IC INVERTER DUAL 4-INPUT US8
產(chǎn)品變化通告: Mold Compound Change 27/Aug/2008
標(biāo)準(zhǔn)包裝: 1
系列: 7WZ
邏輯類型: 逆變器,緩沖器
電路數(shù): 2
輸入數(shù): 4
特點(diǎn): 三態(tài)
電源電壓: 1.65 V ~ 5.5 V
電流 - 靜態(tài)(最大值): 1µA
輸出電流高,低: 32mA,32mA
額定電壓和最大 CL 時(shí)的最大傳播延遲: 5ns @ 5V,50pF
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
供應(yīng)商設(shè)備封裝: US8
封裝/外殼: 8-VFSOP(0.091",2.30mm 寬)
包裝: 標(biāo)準(zhǔn)包裝
產(chǎn)品目錄頁(yè)面: 1225 (CN2011-ZH PDF)
其它名稱: NC7WZ240K8XDKR
2009 Fairchild Semiconductor Corporation
www.fairchildsemi.com
FMS6646 Rev.1.0.3
8
FMS6646
Six
Channel,
SD/HD
108
0p
Vi
deo
Filter
Driver
Applications Information
Functional Description
The FMS6646 Low-Cost Video Filter (LCVF) provides
6dB gain from input to output. In addition, the input is
slightly offset to optimize the output driver performance.
The offset is held to the minimum required value to
decrease the standing DC current into the load. Typical
voltage levels are shown in Figure 10.
Figure 10.
Typical Voltage Levels
The FMS6646 provides an internal diode clamp to
support AC-coupled input signals. If the input signal
does not go below ground, the input clamp does not
operate. This allows DAC out puts to directly drive the
FMS6646 without an AC coupling capacitor. The worst-
case sync tip compression due to the clamp does not
exceed 7mV. The input level set by the clamp,
combined with the internal DC offset, keeps the output
within its acceptable range. When the input is AC-
coupled, the diode clamp sets the sync tip (or lowest
voltage) just below ground.
For symmetric signals like C, U, V, Cb, Cr, Pb, and Pr;
the average DC bias is fairly constant and the inputs
can be AC-coupled with the addition of a pull-up resistor
to set the DC input voltage. DAC outputs can also drive
these same signals without the AC coupling capacitor. A
conceptual illustration of the input clamp circuit is shown
in Figure 11.
Figure 11. Input Clamp Circuit
I/O Congurations
For DC-coupled DAC drive with DC-coupled outputs,
use the conguration shown in Figure 12.
Figure 12.
DC-Coupled Inputs and Outputs
If the DAC’s average DC output level causes the signal
to exceed the range of 0V to 1.4V, it can be AC-coupled
as shown in Figure 13.
Figure 13. AC-Coupled Inputs, DC-Coupled Outputs
When the FMS6646 is driven by an unknown external
source or a SCART switch with its own clamping
circuitry, the inputs should be AC-coupled as shown in
Figure 14.
Figure 14. SCART Conguration with DC-Coupled
Outputs
There is a 280mV offset from the DC input level to the
DC output level. VOUT =2 VIN + 280mV.
0.0 -> 0.02V
0.3 -> 0.32V
0.65 -> 0.67V
1.0 -> 1.02V
VIN
0.28V
0.88V
1.58V
2.28V
Driven by:
DC-Coupled DAC Outputs
AC-Coupled and Clamped
Y, CV, R, G, B
VOUT
0.15V
0.5V
0.85V
VIN
0.58V
1.28V
1.98V
Driven by:
AC-Coupled and Biased
U, V, Pb, Pr, C
VOUT
YOUT
Driver
YIN
0.65V
800k
DVD or
STB
SoC
DAC
Output
75
LCVF
Clamp
Inactive
0V - 1.4V
DVD or
STB
SoC
DAC
Output
LCVF
Clamp
Active
0.1μF
0V - 1.4V
75
LCVF
Clamp
Active
0.1μF
External video
source must
be AC coupled
0V - 1.4V
75
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