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參數(shù)資料
| 型號(hào)： | NB6L611MNR2G |
| 廠商： | ON Semiconductor |
| 文件頁數(shù)： | 6/10頁 |
| 文件大小： | 0K |
| 描述： | IC CLOCK BUFFER 1:2 4GHZ 16-QFN |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 系列： | ECLinPS MAX™ |
| 類型： | 扇出緩沖器（分配） |
| 電路數(shù)： | 1 |
| 比率 - 輸入:輸出： | 1:2 |
| 差分 - 輸入:輸出： | 是/是 |
| 輸入： | CML，LVCMOS，LVDS，LVPECL，LVTTL |
| 輸出： | LVPECL |
| 頻率 - 最大： | 4GHz |
| 電源電壓： | 2.375 V ~ 3.63 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 16-VFQFN 裸露焊盤 |
| 供應(yīng)商設(shè)備封裝： | 16-QFN（3x3） |
| 包裝： | 剪切帶 (CT) |
| 其它名稱： | NB6L611MNR2GOSCT |
NB6L611
http://onsemi.com
5
Table 5. AC CHARACTERISTICS VCC = 2.375 V to 3.63 V, VEE = 0 V, or VCC = 0 V, VEE = 2.375 V to 3.63 V,
Symbol
Characteristic
Min
Typ
Max
Unit
VOUTPP Output Voltage Amplitude (@ VINPP)fin ≤ 1.5 GHz
fin = 2.0 GHz
fin = 3.0 GHz
fin = 4.0 GHz
725
520
320
170
780
680
500
400
mV
tPD
Propagation Delay
D to Q
225
280
375
ps
tSKEW
Duty Cycle Skew (Note 11)
Within Device Skew
Device to Device Skew (Note 12)
3
15
80
ps
tDC
Output Clock Duty Cycle
fin ≤ 4.0 GHz
(Reference Duty Cycle = 50%)
40
50
60
ps
tJITTER
RMS Random Clock Jitter (Note 13)
fin ≤ 4.0 GHz
0.2
0.5
ps
VINPP
Input Voltage Swing/Sensitivity
(Differential Configuration) (Note 14)
150
VCC VEE
mV
tr,tf
Output Rise/Fall Times @ 0.5 GHz (20% 80%)
Q, Q
100
170
ps
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
10.Measured by forcing VINPP (MIN) from a 50% duty cycle clock source. All loading with an external RL = 50 W to VCC 2.0 V. Input edge rates
40 ps (20% 80%).
11. Duty cycle skew is measured between differential outputs using the deviations of the sum of Tpw and Tpw+ @ 0.5GHz.
12.Device to device skew is measured between outputs under identical transition @ 0.5 GHz.
13.Additive RMS jitter with 50% duty cycle clock signal.
14.Input and output voltage swing is a singleended measurement operating in differential mode.
800
700
600
500
400
300
200
100
0
01
23
fout, CLOCK OUTPUT FREQUENCY (GHz)
V
OUTP
P
OUTPUT
VOL
TAGE
AMPLITUDE
(mV)
(TYPICAL)
Figure 3. Output Voltage Amplitude (VOUTPP) versus Output
Frequency at Ambient Temperature (Typical)
4
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