Table 7. AC CHARACTERISTICS VCC = 0 V" />
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  • 參數(shù)資料
    型號: NB6L16D
    廠商: ON Semiconductor
    文件頁數(shù): 10/12頁
    文件大小: 0K
    描述: IC CLK BUFFER DVR TRANSLA 8-SOIC
    產(chǎn)品變化通告: LTB Notification 03/Jan/2008
    NB6L16D Reactivation Notice 24/Jun/2008
    標(biāo)準(zhǔn)包裝: 98
    類型: 緩沖器/驅(qū)動器,變換器
    電路數(shù): 1
    比率 - 輸入:輸出: 1:1
    差分 - 輸入:輸出: 是/是
    輸入: CML,LVCMOS,LVDS,LVNECL,LVPECL,LVTTL
    輸出: ECL
    頻率 - 最大: 6GHz
    電源電壓: 2.375 V ~ 3.465 V
    工作溫度: -40°C ~ 85°C
    安裝類型: 表面貼裝
    封裝/外殼: 8-SOIC(0.154",3.90mm 寬)
    供應(yīng)商設(shè)備封裝: 8-SOICN
    包裝: 管件
    NB6L16
    http://onsemi.com
    7
    Table 7. AC CHARACTERISTICS VCC = 0 V; VEE = 3.465 V to 2.375 V or VCC = 2.375 V to 3.465 V; VEE = 0 V (Note 24)
    Symbol
    Characteristic
    40°C
    25°C
    85°C
    Unit
    Min
    Typ
    Max
    Min
    Typ
    Max
    Min
    Typ
    Max
    VOUTPP
    Output Voltage Amplitude
    fin < 3 GHz
    (See Figures 2 & 3)
    fin < 6 GHz
    500
    270
    700
    350
    500
    270
    700
    350
    500
    270
    700
    300
    mV
    fDATA
    Maximum Operating Data Rate
    6
    Gb/s
    tPLH,
    tPHL
    Propagation Delay to
    Output Differential @ 1 GHz
    80
    130
    180
    80
    130
    180
    85
    135
    185
    ps
    tSKEW
    Duty Cycle Skew (Note 25)
    DevicetoDevice Skew
    3
    30
    25
    60
    3
    30
    25
    60
    3
    30
    25
    60
    ps
    tJITTER
    RMS Random Clock Jitter
    (Note 26)
    fin < 6 GHz
    PeaktoPeak Data Dependent JItter
    (Note 27)
    fin < 6 Gb/s
    0.2
    2
    1
    12
    0.2
    2
    1
    12
    0.2
    2
    1
    12
    ps
    VINPP
    Input Voltage Swing / Sensitivity
    (Differential Configuration) (Note 28)
    75
    700
    2500
    75
    700
    2500
    75
    700
    2500
    mV
    tr
    tf
    Output Rise/Fall Times
    Q, Q
    (20% 80%)
    30
    70
    120
    30
    70
    120
    30
    70
    120
    ps
    NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
    board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
    operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
    values are applied individually under normal operating conditions and not valid simultaneously.
    24.Measured using a 800 mV source, 50% duty cycle clock source. All loading with 50 W to VCC. Input edge rates 40 ps (20% 80%).
    25.See Figure 9 tskew = |tPLH tPHL| for a nominal 50% differential clock input waveform. Skew is measured between outputs under identical
    transitions and conditions @ 1 GHz.
    26.Additive RMS jitter with 50% duty cycle clock signal at 6 GHz.
    27.Additive PeaktoPeak data dependent jitter with NRZ PRBS 2231 data rate at 6 Gb/s.
    28.VINPP(max) cannot exceed VCC VEE. (Applicable only when VCC VEE < 2500 mV). Input voltage swing is a singleended measurement
    operating in the differential mode.
    0.0
    0.1
    0.2
    0.3
    0.4
    0.5
    0.6
    0.7
    0.8
    1
    2
    3
    4
    5
    678
    OUTPUT
    VOL
    TAGE
    AMPLITUDE
    (V)
    INPUT CLOCK FREQUENCY (GHz)
    Figure 2. Output Voltage Amplitude (VOUTPP)
    versus Input Clock Frequency (fIN) and
    Temperature at VCC VEE = 3.3 V
    0.0
    0.1
    0.2
    0.3
    0.4
    0.5
    0.6
    0.7
    0.8
    12
    34
    5
    6
    7
    8
    INPUT CLOCK FREQUENCY (GHz)
    Figure 3. Output Voltage Amplitude (VOUTPP)
    versus Input Clock Frequency (fIN) and
    Temperature at VCC VEE = 2.5 V
    OUTPUT
    VOL
    TAGE
    AMPLITUDE
    (V)
    85°C
    40°C
    25°C
    40°C
    25°C
    85°C
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