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參數(shù)資料
| 型號： | NB6L14MNR2G |
| 廠商： | ON Semiconductor |
| 文件頁數(shù)： | 6/10頁 |
| 文件大小： | 0K |
| 描述： | IC CLOCK BUFFER 1:4 3GHZ 16-QFN |
| 標準包裝： | 1 |
| 系列： | ECLinPS MAX™ |
| 類型： | 扇出緩沖器（分配） |
| 電路數(shù)： | 1 |
| 比率 - 輸入:輸出： | 1:4 |
| 差分 - 輸入:輸出： | 是/是 |
| 輸入： | CML，LVCMOS，LVDS，LVPECL，LVTTL |
| 輸出： | LVCMOS，LVPECL |
| 頻率 - 最大： | 3GHz |
| 電源電壓： | 2.375 V ~ 3.63 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 16-VFQFN 裸露焊盤 |
| 供應(yīng)商設(shè)備封裝： | 16-QFN（3x3） |
| 包裝： | 剪切帶 (CT) |
| 其它名稱： | NB6L14MNR2GOSCT |
NB6L14M
http://onsemi.com
5
Symbol
Characteristic
Min
Typ
Max
Unit
VOUTPP
fin ≤ 2.5 GHz
2.5 GHz
≤ fin ≤ 3.0 GHz
180
100
340
250
mV
fDATA
Maximum Operating Data Rate
2.5
Gb/s
tPD
Propagation Delay
IN to Q
230
350
480
ps
tS
Set-Up Time (Note 11)
EN to IN, IN
300
ps
tH
Hold Time (Note 11)
EN to IN, IN
300
ps
tSKEW
Within-Device Skew (Note 12)
Device-to-Device Skew (Note 13)
5.0
20
80
ps
tDC
Output Clock Duty Cycle
fin ≤ 3.0 GHz
(Referenced Duty Cycle = 50%)
40
50
60
%
tJITTER
RMS Random Jitter (Note 14)
fIN ≤ 3.0 GHz
Peak-to-Peak Data Dependent Jitter
(Note 15)
fDATA≤ 3.0 Gb/s
0.2
20
0.5
ps
VINPP
Input Voltage Swing/Sensitivity
(Differential Configuration) (Note 10)
100
VCC - GND
mV
tr,tf
Output Rise/Fall Times
(20%-80%)
90
150
ps
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
9. Measured by forcing VINPP (minimum) from a 50% duty cycle clock source. All loading with an external RL = 50 W to VCC. Input edge rates
40 ps (20%-80%).
10. Input and output voltage swing is a single-ended measurement operating in differential mode.
11. Set-up and hold times apply to synchronous applications that intend to enable/disable before the next clock cycle. For asynchronous
applications, set-up and hold times do not apply.
12. Within device skew is measured between two different outputs under identical power supply, temperature and input conditions.
13. Device to device skew is measured between outputs under identical transition @ 0.5 GHz.
14. Additive RMS jitter with 50% duty cycle clock signal.
15. Additive peak-to-peak data dependent jitter with input NRZ data at PRBS 23-1 and K28.5 at 2.5 Gb/s.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| NB6L14S | 制造商:ONSEMI 制造商全稱:ON Semiconductor 功能描述:2.5 V 1:4 AnyLevel? Differential Input to LVDS Fanout Buffer/Translator |
| NB6L14SMNG | 功能描述:時鐘緩沖器 CZ4 DIFF IN LVDS OUT RoHS:否 制造商:Texas Instruments 輸出端數(shù)量:5 最大輸入頻率:40 MHz 傳播延遲（最大值）: 電源電壓-最大:3.45 V 電源電壓-最小:2.375 V 最大功率耗散: 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LLP-24 封裝:Reel |
| NB6L14SMNTWG | 功能描述:時鐘驅(qū)動器及分配 2.5V 1:4 ANY Lvl FANOUT RoHS:否 制造商:Micrel 乘法/除法因子:1:4 輸出類型:Differential 最大輸出頻率:4.2 GHz 電源電壓-最大: 電源電壓-最小:5 V 最大工作溫度:+ 85 C 封裝 / 箱體:SOIC-8 封裝:Reel |
| NB6L14SMNTXG | 功能描述:時鐘緩沖器 CZ4 DIFF IN LVDS OUT RoHS:否 制造商:Texas Instruments 輸出端數(shù)量:5 最大輸入頻率:40 MHz 傳播延遲（最大值）: 電源電壓-最大:3.45 V 電源電壓-最小:2.375 V 最大功率耗散: 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LLP-24 封裝:Reel |
| NB6L16 | 制造商:ONSEMI 制造商全稱:ON Semiconductor 功能描述:2.5V / 3.3V Multilevel Input to Differential LVPECL/LVNECL Clock or Data Receiver/Driver/Translator Buffer |
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