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參數(shù)資料
| 型號： | NB4N527SMNR2 |
| 廠商： | ON Semiconductor |
| 文件頁數(shù)： | 5/10頁 |
| 文件大小： | 0K |
| 描述： | IC DRVR/RCVR/BUFF/XLATOR 16-QFN |
| 產(chǎn)品變化通告： | Product Discontinuation 20/Aug/2008 |
| 標(biāo)準(zhǔn)包裝： | 3,000 |
| 邏輯類型： | 接收器，驅(qū)動(dòng)器，緩沖器，變換器 |
| 電源電壓： | 3 V ~ 3.6 V |
| 位數(shù)： | 2 |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 16-VFQFN 裸露焊盤 |
| 供應(yīng)商設(shè)備封裝： | 16-QFN（3x3） |
| 包裝： | 帶卷 (TR) |
NB4N527S
http://onsemi.com
4
Table 4. DC CHARACTERISTICS, CLOCK INPUTS, LVDS OUTPUTS VCC = 3.0 V to 3.6 V, GND = 0 V, TA = 40°C to +85°C
Symbol
Characteristic
Min
Typ
Max
Unit
ICC
Power Supply Current (Note 8)
40
53
mA
Vth
Input Threshold Reference Voltage Range (Note 7)
GND +100
VCC 100
mV
VIH
Singleended Input HIGH Voltage
Vth + 100
VCC
mV
VIL
Singleended Input LOW Voltage
GND
Vth 100
mV
VIHD
Differential Input HIGH Voltage
100
VCC
mV
VILD
Differential Input LOW Voltage
GND
VCC 100
mV
VCMR
Input Common Mode Range (Differential Configuration)
GND + 50
VCC 50
mV
VID
Differential Input Voltage (VIHD VILD)
100
VCC
mV
RTIN
Internal Input Termination Resistor
40
50
60
W
LVDS OUTPUTS (Note 4)
VOD
Differential Output Voltage
250
450
mV
DVOD
0
1
25
mV
VOS
Offset Voltage (Figure 15)
1125
1375
mV
DVOS
0
1
25
mV
VOH
Output HIGH Voltage (Note 5)
1425
1600
mV
VOL
Output LOW Voltage (Note 6)
900
1075
mV
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
4. LVDS outputs require 100 W receiver termination resistor between differential pair. See Figure 14.
5. VOHmax = VOSmax + VODmax.
6. VOLmax = VOSmin VODmax.
7. Vth is applied to the complementary input when operating in singleended mode.
8. Input termination pins open, Dx/Dx at the DC level within VCMR and output pins loaded with RL = 100 W across differential.
9. Parameter guaranteed by design verification not tested in production.
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