- 鎮ㄧ従(xi脿n)鍦ㄧ殑浣嶇疆锛�璨疯常IC缍� > PDF鐩寗8634 > NB4L16MMN (ON Semiconductor)IC CLK BUFFER DVR TRANSLA 16-QFN PDF璩囨枡涓嬭級
鍙冩暩(sh霉)璩囨枡
| 鍨嬭櫉锛� | NB4L16MMN |
| 寤犲晢锛� | ON Semiconductor |
| 鏂囦欢闋佹暩(sh霉)锛� | 5/12闋� |
| 鏂囦欢澶�?銆�?/td> | 0K |
| 鎻忚堪锛� | IC CLK BUFFER DVR TRANSLA 16-QFN |
| 鐢㈠搧璁婂寲閫氬憡锛� | Product Discontinuation 20/Aug/2008 |
| 妯欐簴鍖呰锛� | 123 |
| 椤炲瀷锛� | 绶╂矕鍣�/椹呭嫊鍣紝璁婃彌鍣� |
| 闆昏矾鏁�(sh霉)锛� | 1 |
| 姣旂巼 - 杓稿叆:杓稿嚭锛� | 2:1 |
| 宸垎 - 杓稿叆:杓稿嚭锛� | 鏄�/鏄� |
| 杓稿叆锛� | CML锛孒STL锛孡VCMOS锛孡VDS锛孡VPECL锛孡VTTL |
| 杓稿嚭锛� | CML |
| 闋荤巼 - 鏈€澶э細 | 3.5GHz |
| 闆绘簮闆诲锛� | 2.375 V ~ 3.8 V |
| 宸ヤ綔婧害锛� | -40°C ~ 85°C |
| 瀹夎椤炲瀷锛� | 琛ㄩ潰璨艰 |
| 灏佽/澶栨锛� | 16-VFQFN 瑁搁湶鐒婄洡 |
| 渚涙噳鍟嗚ō鍌欏皝瑁濓細 | 16-QFN锛�3x3锛� |
| 鍖呰锛� | 绠′欢 |
NB4L16M
http://onsemi.com
2
Figure 2. Pin Configuration (Top View)
VCC NC VEE VEE
VCC VBB VEE VEE
VCC
Q
VCC
VTD
D
VTD
56
7
8
16
15
14
13
12
11
10
9
1
2
3
4
NB4L16M
Exposed Pad (EP)
Table 1. PIN DESCRIPTION
Pin
Name
I/O
Description
1
VTD
Internal 50 W termination pin. See Table 4 (Note 1).
2
D
LVPECL, CML, HSTL,
LVCMOS, LVDS, LVTTL Input
Inverted differential input. Internal 36.5 kW to VCC and 73 kW to VEE
(Note 1).
3
D
LVPECL, CML, HSTL,
LVCMOS, LVDS, LVTTL Input
Noninverted differential input. Internal 73 kW to VCC and 36.5 kW to VEE
(Note 1).
4
VTD
15
VBB
Internally generated reference voltage supply.
6
NC
No Connect pin. The No Connect (NC) pin is electrically connected to the
die and MUST be left open.
10
Q
CML Output
Noninverted differential output. Typically receiver terminated with 50 W
resistor to VCC.
11
Q
CML Output
Inverted differential output. Typically receiver terminated with 50 W resistor
to VCC.
7, 8, 13, 14
VEE
Negative supply voltage
5, 9, 12, 16
VCC
Positive supply voltage
EP
Exposed pad (EP). EP on the package bottom is thermally connected to the
die for improved heat transfer out of the package. The pad is not electrically
connected to the die, but is recommended to be soldered to VEE on the
PC Board.
1. In the differential configuration when the input termination pins (VTD, VTD) are connected to a common termination voltage and if no signal
is applied on D/D input then the device will be susceptible to selfoscillation.
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