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參數(shù)資料
| 型號(hào)： | NB3N853501EDTR2G |
| 廠商： | ON Semiconductor |
| 文件頁(yè)數(shù)： | 5/9頁(yè) |
| 文件大?。?/td> | 0K |
| 描述： | IC CLOCK BUFFER MUX 2:4 20-TSSOP |
| 標(biāo)準(zhǔn)包裝： | 2,500 |
| 類型： | 扇出緩沖器（分配），多路復(fù)用器 |
| 電路數(shù)： | 1 |
| 比率 - 輸入:輸出： | 2:4 |
| 差分 - 輸入:輸出： | 無(wú)/是 |
| 輸入： | LVCMOS，LVTTL |
| 輸出： | LVPECL |
| 頻率 - 最大： | 266MHz |
| 電源電壓： | 3.135 V ~ 3.465 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 20-TSSOP（0.173"，4.40mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 20-TSSOP |
| 包裝： | 帶卷 (TR) |
NB3N853501E
http://onsemi.com
5
Table 6. AC CHARACTERISTICS VCC = 3.3 ±5% V (3.135 to 3.465 V), GND = 0 V, TA = 40°C to +85°C (Note 6)
Symbol
Characteristic
Min
Typ
Max
Unit
FMAX
Maximum Operating Frequency
0
266
MHz
tPD
Propagation Delay
0.9
2.0
ns
tSKEWDC
Duty Cycle Skew same path similar conditions at 50 MHz
48
50
52
%
tSKEWOO
Output to Output Skew Within A Device
30
ps
tSKEWDD
DevicetoDevice Skew similar path and conditions
250
ps
tJIT
Additive Phase Noise Jitter (RMS) @ 155.52 MHz (Integrated from 12 kHz to
20 MHz) See Figure 6.
0.062
ps
tr/tf
Output rise and fall times @ 266 MHz (20% and 80% points)
240
700
ps
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
6. Outputs terminated 50 W to VCC 2.0 V, see Figure 4. Input levels of 0.8 V and 2.4 V unless stated otherwise. Measured from Input Midpoint
Figure 4. Typical Test Setup and Termination for Evaluation. The VCC of 2.0 V and VEE of 1.3 ±0.165 V Split
supply allows a direct connection to an oscilloscope 50 W impedance input module. Also reference AND8020.
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