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參數資料
| 型號： | NA851C |
| 廠商： | NEC Corp. |
| 英文描述： | 32 Bit RISC Microcontrollers Core(32 位單片微控制器) |
| 中文描述： | 32位RISC微控制器核心（32位單片微控制器） |
| 文件頁數： | 1/2頁 |
| 文件大?。?/td> | 31K |
| 代理商： | NA851C |
N A 8 5 1 C
The NA851C is a core version of the V851
microcontroller that employs the advanced 32-bit RISC
engine of NEC’s V850
family and is suitable for real-time control applications with 38 Dhrystone
MIPS at 3.3V. The NA851C is supported by NEC’s CB-C9, 0.35-μm CMOS process technology for
core-based ASIC development and enables designers to specify the amount of on-board ROM, RAM,
and flash memory. The architecture of the V851 microcontroller is highly optimized for fast
DSP-like operation and very efficient implementation of C programmability.
The NA851 core is fully supported by NEC’s sophisticated OpenCAD
design framework that
combines popular third-party design tools with proprietary NEC tools, including advanced floorplanner
and clock tree synthesis tools. A wide range of OpenCAD macros is available, including A/D and D/A
converters, watchdog timer, I
C
interface, parallel/serial controllers, and universal serial bus.
NEC’s CB-C9 Titanium-Silicide process achieves 1.6 million usable gates with a 3.3V power supply
and features a 5V tolerance interface with exceptionally low power dissipation (0.7 μW/MHz/gate).
V 8 5 1
3 2 - B I T R I S C M I C R O C O N T R O L L E R C O R E
B L O C K D I A G R A M
BUNRI, TEST
TBI0–TBI39
TBO0–TBO24
96NI-1080C (11/98)
ALU
NMI
ASTB
DSTBB
RWB
UBENB
LBENB
WAITB
CLKIN
CLKOUT
OSCEN
CLKSTPB
INTP00 to
INTP03
INTP10 to
INTP13
ROM
SIO
CPU
BCU
RAM
TO10 to
TO11
ST0–ST1
MODE0–
MODE1
AD0–AD15
A16–A23
ADLOENB
ADHOEMB
HLDRQB
HLDAKB
RESET B
TBCENB
System
Programmable
Interrupt
Controller
Real-Time
Pulse Unit
User
Specifiable
User
Specifiable
32-Bit Barrel
Shifter
PC
System
Register
General-
Purpose
Registers
(32-Bit x 32)
Multiplier
16 x 16 32
Bus Control
Unit
Prefetch
Control
Instruction
Queue
Test MUX
TXD
RXD
TCLR1
TI1
BRG
CSI
SO
SI
SOENB
CSKOENB
SCKB
UART
S
E
R
I
S
850
850
850
R
I
S
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