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參數(shù)資料
| 型號： | N32T1630C1E |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | 32Mb Ultra-Low Power Asynchronous CMOS PSRAM |
| 中文描述： | 32兆超低功耗異步的CMOS移動存儲芯片 |
| 文件頁數(shù)： | 1/14頁 |
| 文件大?。?/td> | 336K |
| 代理商： | N32T1630C1E |
NanoAmp Solutions, Inc.
1982 Zanker Road, San Jose, CA 95112
ph: 408-573-8878, FAX: 408-573-8877
www.nanoamp.com
N32T1630C1E
The specifications of this device are subject to change without notice. For latest documentation see http://www.nanoamp.com.
(DOC # 14-02-006 Rev C ECN 01-1040
1
32Mb Ultra-Low Power Asynchronous CMOS PSRAM
2M x 16 bit
Overview
The N32T1630C1E is an integrated memory
device containing a 32 Mbit Pseudo Static Random
Access Memory using a self-refresh DRAM array
organized as 2,097,152 words by 16 bits. It is
designed to be identical in operation and interface
to standard 6T SRAMS. The device is designed for
low standby and operating current and includes a
power-down feature to automatically enter standby
mode. Also included are several other power
saving modes: a deep sleep mode where data is
not retained in the array and partial array refresh
mode where data is retained in a portion of the
array. Both these modes reduce standby current
drain. The device can operate over a very wide
temperature range of -25
o
C to +85
o
C.
Features
Dual voltage for Optimum Performance:
Vccq - 2.7V to 3.3V
Vcc - 2.7V to 3.3V
Fast Cycle Times
T
ACC
< 60 nS
T
ACC
< 70 nS
Very low standby current
I
SB
< 120μA
Very low operating current
Icc < 25mA
Dual rail operation
V
CCQ
and V
SSQ
for separate I/O power rail
Compact Space Saving BGA Package
Figure 1: Pin Configuration
Product Family
Part Number
Package
Type
Operating
Temperature
Power
Supply
Speed
Standby
Current (I
SB
),
Max
Operating
Current (Icc),
Max
N32T1630C1EZ
48-BGA
-25
o
C to +85
o
C
2.7V - 3.3V(V
CC
)
60ns
70ns
120
μ
A
3 mA @ 1MHz
1
2
3
4
5
6
A
LB
OE
A
0
A
1
A
2
ZZ
B
I/O
8
UB
A
3
A
4
CE
I/O
0
C
I/O
9
I/O
10
A
5
A
6
I/O
1
I/O
2
D
V
SSQ
I/O
11
A
17
A
7
I/O
3
V
CC
E
V
CCQ
I/O
12
NC
A
16
I/O
4
V
SS
F
I/O
14
I/O
13
A
14
A
15
I/O
5
I/O
6
G
I/O
15
A
19
A
12
A
13
WE
I/O
7
H
A
18
A
8
A
9
A
10
A
11
A
20
48 Pin BGA (top)
6 x 8 mm
Table 1: Pin Descriptions
Pin Name
Pin Function
A
0
-A
20
Address Inputs
WE
Write Enable Input
CE
Chip Enable Input
ZZ
Deep Sleep Input
OE
Output Enable Input
LB
Lower Byte Enable Input
UB
Upper Byte Enable Input
I/O
0
-I/O
15
Data Inputs/Outputs
V
CC
Power
V
SS
Ground
V
CCQ
Power I/O only
V
SSQ
Ground I/O only
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