Application Information
(Continued)
In order to eliminate "clicks and pops", all capacitors must be
discharged before turn-on. Rapidly switching V
DD
may not
allow the capacitors to fully discharge, which may cause
"clicks and pops".
AUDIO POWER AMPLIFIER DESIGN
Audio Amplifier Design: Driving 1W into an 8
Load
Given:
Power Output
Load Impedance
Input Level
Input Impedance
Bandwidth
1 Wrms
8
1 Vrms
>
20k
100Hz – 20kHz
±
0.25 dB
The design begins by specifying the minimum supply voltage
necessary to obtain the specified output power. One way to
find the minimum supply voltage is to use the Output Power
vs Supply Voltage curve in the Typical Performance Charac-
teristics section. Another way, using Equation (8), is to cal-
culate the peak output voltage necessary to achieve the
desired output power for a given load impedance. To ac-
count for the amplifier’s dropout voltage, two additional volt-
ages, based on the Dropout Voltage vs Supply Voltage in the
Typical Performance Characteristics curves, must be added
to the result obtained by Equation (8). The result is Equation
(9).
(8)
(9)
V
DD
= V
OUTPEAK
+ V
ODTOP
+ V
ODBOT
The Output Power vs. Supply Voltage graph for an 8
load
indicates a minimum supply voltage of 4.6V. The commonly
used 5V supply voltage easily meets this. The additional
voltage creates the benefit of headroom, allowing the
LM4914 to produce peak output power in excess of 1W
without clipping or other audible distortion. The choice of
supply voltage must also not create a situation that violates
of maximum power dissipation as explained above in the
Power Dissipation section.
After satisfying the LM4914’s power dissipation require-
ments, the minimum differential gain needed to achieve 1W
dissipation in an 8
load is found using Equation (10).
(RESUME HERE- All that is left is to discuss the BTL low
frequency phase shift.)
(10)
Thus, a minimum gain of 2.83 allows the LM4914’s to reach
full output swing and maintain low noise and THD+N perfor-
mance. For this example, let A
(BTL) = 3. The amplifier’s
overall gain is set using the input (Ri), the first stage internal
feedback resistor, and the second stage’s fixed gain of 1.25.
With the desired input impedance set at 20kW, the feedback
resistor is found using Equation (11).
R
i
= -125k
/ A
V
(BTL)
The value of Ri is 44.2k
. The nominal output power is
1.13W.
The last step in this design example is setting the amplifier’s
-3dB frequency bandwidth. To achieve the desired
±
0.25dB
pass band magnitude variation limit, the low frequency re-
sponse must extend to at least one-fifth the lower bandwidth
limit and the high frequency response must extend to at least
five times the upper bandwidth limit. The gain variation for
both response limits is 0.17dB, well within the
±
0.25dB-
desired limit. The results are an
f
L
= 100Hz / 5 = 20Hz
and an
f
L
= 20kHz x 5 = 100kHz
As mentioned in the SELECTING EXTERNAL COMPO-
NENTS section, Ri and C
create a highpass filter that sets
the amplifier’s lower bandpass frequency limit. Find the cou-
pling capacitor’s value using Equation (14).
C
i
= 1 / 2
π
R
i
f
L
The result is
1 / 2
π
x 44.2k
x 20Hz = 0.180μF
Use a 180μF capacitor, the closest standard value.
The product of the desired high frequency cutoff (100kHz in
this example) and the differential gain A
V
(BTL), determines
the upper passband response limit. With A
(BTL) = 3 and fH
= 100kHz, the closed-loop gain bandwidth product (GBWP)
is 300kHz. This is less than the LM4914’s 3.5MHz GBWP.
With this margin, the amplifier can be used in designs that
require more differential gain while avoiding performance
restricting bandwidth limitations.
(11)
(12)
(13)
(14)
(15)
L
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