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參數(shù)資料
| 型號(hào)： | MXC6202N |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | Low Power, Low Profile 【2 g Dual Axis Accelerometer with I2C Interface |
| 中文描述： | 低功耗，低簡(jiǎn)介【2克雙軸加速度計(jì)I2C接口 |
| 文件頁(yè)數(shù)： | 10/10頁(yè) |
| 文件大?。?/td> | 313K |
| 代理商： | MXC6202N |
Fourth cycle: Master device sends a START command
followed by calling Memsic device address with a WRITE
(8
th
SCL, SDA keep low). An “acknowledge” should be
sent by Memsic device at the end.
Fifth cycle: Master device writes to Memsic device a
“[00000000]” as the starting address for which internal
memory is to be read. Since “[00000000]” is the address of
internal control register, reading from this address can serve
as a verification of operation and to confirm the write
command has been successful. Note: the starting address in
principle can be any of the 5 addresses. For example, user
can start read from address [0000001], which is X channel
MSB.
Sixth cycle: Master device calls Memsic device address
with a READ (8
th
SCL cycle SDA line high). Memsic
device should acknowledge at the end.
Seventh cycle: Master device cycles SCL line, first
addressed memory data appears on SDA line. If in step 7,
“[00000000]”
was sent, internal control register data
should appear (in the following steps, this case is assumed).
Master device should send acknowledge at the end.
LCC-8 PACKAGE DRAWING
MEMSIC MXC6202G/H/M/N
Rev.B
Page 10 of 10
11
/10/2005
Eighth cycle: Master device continues cycle SCL line, next
byte of internal memory should appear on SDA line (MSB
of X channel). The internal memory address pointer
automatically
moves
to
acknowledges.
Ninth cycle: LSB of X channel. In the case that TOEN bit
of internal register was set to “1”, the MSB and LSB of
TOUT (temperature) should appear in last two steps.
Tenth cycle: MSB of Y channel.
Eleventh cycle: LSB of Y channel.
Master ends communications by sending NO acknowledge
and followed by a STOP command. Note: if mater device
continues to cycle SCL line, the memory pointer will go to
sixth and seventh positions, which always have
“[00000000]”. After seventh position, pointer will go to
zero again.
Optional: Master powers down Memsic device by writing
into internal control register. (See step 1 through 4 for
WRITE operation)
the
next
byte.
Master
Hermetically Sealed Package Outline
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| MXC6202XJ | Ultra Low Cost, 【2.0 g Dual Axis Accelerometer With I2C Interface |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MXC6202XJ | 制造商:未知廠家 制造商全稱(chēng):未知廠家 功能描述:Ultra Low Cost, ±2.0 g Dual Axis Accelerometer With I2C Interface |
| MXC6202XK | 制造商:未知廠家 制造商全稱(chēng):未知廠家 功能描述:Ultra Low Cost, ±2.0 g Dual Axis Accelerometer With I2C Interface |
| MXC6225XC (DTOS WLP) | 制造商:MEMSIC INC 功能描述:IC ACCELEROMETER XY AXIS 6CSP |
| MXC6225XU DTOS | 制造商:MEMSIC INC 功能描述:IC ACCELEROMETER XY AXIS LCC6 |
| MXC6226XC (DTOS WLP) | 功能描述:Accelerometer X, Y Axis ±2g 10Hz 6-CSP 制造商:memsic inc. 系列:- 包裝:剪切帶（CT） 零件狀態(tài):停產(chǎn) 類(lèi)型:數(shù)字 軸:X，Y 加速度范圍:±2g 靈敏度（LSB/g）:64 靈敏度（mV/g）:- 帶寬:10Hz 輸出類(lèi)型:I2C 電壓 - 電源:2.5 V ~ 5.5 V 特性:- 工作溫度:-20°C ~ 70°C（TA） 安裝類(lèi)型:表面貼裝 封裝/外殼:6-CSP 供應(yīng)商器件封裝:6-CSP 標(biāo)準(zhǔn)包裝:1 |
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