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參數(shù)資料
| 型號： | MX826 |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | AMPS/NAMPS SYSTEM AUDIO PROCESSOR |
| 中文描述： | 的AMPS / NAMPS系統(tǒng)的音頻處理器 |
| 文件頁數(shù)： | 6/13頁 |
| 文件大?。?/td> | 328K |
| 代理商： | MX826 |
AMPS/NAMPS System Audio Processor.
The Controlling System:
C-BUS Hardware Interface
C-BUS is MX-COM's proprietary standard for the transmission of commands and data between a
μ
Controller and MX-
COM's New Generation integrated circuits. C-BUS has been designed for a low IC pin-count, flexibility in handling variable
amounts of data, and simplicity of system design and
μ
Controller software.
It may be used with any
μ
Controller, and can, if desired, take advantage of the hardware serial I/O functions built into
many types of
μ
Controller. Because of this flexibility and because the BUS data-rate is determined solely by the
μ
Controller, the system designer has complete freedom to choose a
μ
Controller appropriate to the overall system
processing requirements.
Control of the functions and levels within the MX826 is by a group of Address/Commands and appended data
instructions from the system
μ
Controller to set/adjust the functions and elements of the device. The use of these
instructions is detailed in the following paragraphs and tables.
MX826 Preliminary Information
1997 MX
COM Inc.
4800 Bethania Station Road, Winston-Salem, NC 27105-1201 USA
www.mxcom.com Tele: 800 638-5577 910 744-5050 Fax: 910 744-5054
Doc. # 20480070.004
All trademarks and service marks are held by their respective companies.
Control Bits
Transmitted First
Sw8 Sidetone
Sidetone Bias
Sidetone Enabled
Sw6/7 RX Audio
Ear Enabled, LS Bias
LS Enabled, Ear Bias
Sw5 Expandor
Expander By-Pass
Expander Route
Sw4 TX/RX Audio
Tx Store/Audio
Rx Store/Audio
Sw3 Dev. Limiter
Dev. Limiter Bypass
Dev. Limiter Route
Sw1 Mic. Inputs
Mic. 1 Input
Mic.2 Input
Sw2 TX Function
DTMF In
Compressor Bypass
Compressor In
Play In
Setting
MSB
Bit 7
0
1
6
0
1
5
0
1
4
0
1
3
0
1
2
0
1
1
0
0
1
1
0
0
1
0
1
Setting
MSB
7
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
6
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
5
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
4
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
3
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
2
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
Gain (dBs)
Transmitted First
Tx Mod. Level
OFF (Low Z to V
BIAS
)
-5.6
-5.2
-4.8
-4.4
-4.0
-3.6
-3.2
-2.8
-2.4
-2.0
-1.6
-1.2
-0.8
-0.4
0
TX Input Gain
-2.65
-2.05
-1.50
-0.95
-0.45
0
0.45
0.85
1.25
1.65
2.05
2.40
2.70
3.05
3.35
3.65
Table 3 TX Gain & Mod. Commands
Table 2 Configuration Commands
Command
Assignment
Address/Command (A/C) Byte
Hex
MSB
Command
Data
Table
Binary
LSB
General Reset
Configuration Command
TX Gain & Mod. Command
RX Gain & Vol. Command
Powersave Command
Table 1 “C-Bus” Address/Commands
01
10
11
12
13
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
0
1
0
1
+
+
+
+
1 byte
1 byte
1 byte
1 byte
2
3
4
5
Configuration Command
(
Preceded by A/C 10
H
)
TX Gain & Mod. Command
(Preceded by A/C 11
H
)
In C-BUS protocol the audio processor is allocated
Address/Command (A/C) values 10
to 13
. Configuration, TX/
RX Gains, Powersave assignments and data requirements are
given in Table 1. Each instruction consists of an Address/
Command (A/C) byte followed by a data instruction formulated
from the following tables.
Commands and Data are only to be loaded in the group
configurations detailed, as the C-BUS interface recognizes the
first byte after Chip Select (logic “0”) as an Address/Command.
Function or Level control data, which is detailed in Tables 2, 3,
4 and 5, is acted upon at the end of the loaded instruction. See
Timing Diagrams, Figures 5 and 6.
Upon Power-Up the value of the “bits” in this device will be
random (either “0” or “1”). A
General Reset Command (01
H
)
will be required to set all MX826 registers to 00
H
.
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