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  • 參數(shù)資料
    型號: MX7837BR+
    廠商: Maxim Integrated Products
    文件頁數(shù): 11/12頁
    文件大?。?/td> 0K
    描述: IC DAC 12BIT DL MULT 24SOIC
    產(chǎn)品培訓(xùn)模塊: Lead (SnPb) Finish for COTS
    Obsolescence Mitigation Program
    標(biāo)準(zhǔn)包裝: 30
    設(shè)置時(shí)間: 4µs
    位數(shù): 12
    數(shù)據(jù)接口: 并聯(lián)
    轉(zhuǎn)換器數(shù)目: 2
    電壓電源: 雙 ±
    功率耗散(最大): 941mW
    工作溫度: -40°C ~ 85°C
    安裝類型: 表面貼裝
    封裝/外殼: 24-SOIC(0.295",7.50mm 寬)
    供應(yīng)商設(shè)備封裝: 24-SOIC W
    包裝: 管件
    輸出數(shù)目和類型: 2 電壓,單極;2 電壓,雙極
    采樣率(每秒): *
    MX7837/MX7847
    Bipolar Operation (4-Quadrant
    Multiplication)
    Figure 7 shows the MX7837/MX7847 connected for
    binary operation. The offset-binary coding is shown in
    Table 4. When VIN is an AC signal, the circuit performs
    4-quadrant multiplication. R1, R2, and R3 resistors
    should be 0.01% ratio matched to maintain gain-error
    specifications. On the MX7847, the RFB feedback
    resistor is internally connected to VOUT.
    Table 4. Bipolar Code Table
    __________Applications Information
    Ground Management
    The use of an uninterrupted ground plane is strongly
    recommended. AC or transient voltages between ana-
    log and digital grounds (between AGNDA/AGNDB and
    DGND) can inject noise into the analog circuitry.
    Connect the MX7837/MX7847 AGNDs and DGND
    directly to the ground plane or to a star ground to
    ensure that they are at the same potential. In complex
    systems with separate analog and digital ground
    planes, connect two diodes (1N914 or equivalent) in
    inverse parallel between the AGND and DGND pins.
    Power-Supply Decoupling
    To minimize noise, decouple the VDD and VSS lines to
    DGND using a 10F capacitor in parallel with a 0.1F
    ceramic capacitor. Minimize capacitor lead lengths for
    best noise rejection.
    Operation with Reduced
    Power-Supply Voltages
    The MX7837/MX7847 are specified for operation with
    VDD/VSS = ±11.4V to ±16.5V. However, the output
    amplifier requires 2.5V of headroom, so the reference
    input should not come within 2.5V of VDD/VSS in order to
    maintain accuracy at full scale.
    Complete, Dual, 12-Bit
    Multiplying DACs
    8
    _______________________________________________________________________________________
    DAC A
    AGNDA VSS
    DGND
    RFBA*
    VOUTA*
    VOUT
    VIN
    VDD
    VREFA
    VDD
    MX7837
    MX7847
    * INTERNALLY CONNECTED ON MX7847
    VSS
    DAC A
    AGNDA
    VSS
    DGND
    RFBA*
    VOUTA
    VIN
    VDD
    VREFA
    MX7837
    MX7847
    VOUT
    R1
    20k
    R2
    20k
    R3
    10k
    MAX427
    VDD
    VSS
    * INTERNALLY CONNECTED
    ON MX7847
    DAC Latch Contents
    MSB
    LSB
    Analog Output, VOUT
    1111 1111 1111
    V
    2047
    2048
    IN
    1000 0000 0001
    V
    1
    2048
    IN
    0111 1111 1111
    ×
    V
    1
    2048
    IN
    0000 0000 0000
    ×
    =
    V
    2048
    V
    IN
    1000 0000 0000
    0V
    Note : 1LSB
    V
    2048
    IN
    =
    Figure 6. Unipolar Binary Operation
    Figure 7. Bipolar Offset Binary Operation
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