參數(shù)資料
型號: MX574AJP+
廠商: Maxim Integrated Products
文件頁數(shù): 18/18頁
文件大?。?/td> 0K
描述: IC ADC 12BIT W/REF 28-PLCC
產(chǎn)品培訓(xùn)模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標(biāo)準(zhǔn)包裝: 39
位數(shù): 12
采樣率(每秒): 40k
數(shù)據(jù)接口: 并聯(lián)
轉(zhuǎn)換器數(shù)目: 1
功率耗散(最大): 265mW
電壓電源: 雙 ±
工作溫度: 0°C ~ 70°C
安裝類型: 表面貼裝
封裝/外殼: 28-LCC(J 形引線)
供應(yīng)商設(shè)備封裝: 28-PLCC(11.51x11.51)
包裝: 管件
輸入數(shù)目和類型: 2 個單端,單極;2 個單端,雙極
Maxim Integrated Products 9
MAX174/MX574A/MX674A
Industry-Standard, Complete 12-Bit ADCs
Table 1. Truth Table
After the conversion is completed, data can be obtained
by the microprocessor. The ADCs have the required
logic for 8-, 12-, and 16-bit bus interfacing, which is
determined by the 12/8 input. If 12/8 is high, the ADCs
are configured for a 16-bit bus. Data lines D0–D11 may
be connected to the bus as either the 12 MSBs or the 12
LSBs. The other 4 bits must be masked out in software.
For 8-bit bus operation, 12/8 is set low. The format is left
justified, and the even address, A0 low, contains the 8
MSBs. The odd address, A0 high, contains the 4 LSBs,
which is followed by 4 trailing 0s. There is no need to
use a software mask when the ADCs are connected to
an 8-bit bus.
Note that the output cannot be forced to a right-justified for-
mat by rearranging the data lines on the 8-bit bus interface.
Figure 3. Analog Equivalent Circuit
Table 2. MAX174/MX574A/MX674A Data
Format for 8-Bit Bus
CE
CS
R/C
12/8
A0
OPERATION
0
X
None
X
1
X
None
1
0
X
0
Initiate 12-bit conversion
1
0
X
1
Initiate 12-bit conversion
1
0
1
X
Enable 12-bit conversion
1
0
1
0
Enable 8 MSBs
1
0
1
0
1
Enable 4 LSBs + 4
trailing 0s
D7
D6
D5
D4
D3
D2
D1
D0
High Byte
(A0 = 0)
MSB
D10
D9
D8
D7
D6
D5
D4
Low Byte
(A0 = 1)
D3
D2
D1
D0
0
R*
2R* -50I
5kI
9.950kI
5kI
1.6kI
BIPOFF
10VIN
20VIN
REFIN
SAR
2.5kI
DAC
REFIN
2
27 (MSB)
26 (D10)
25 (D9)
24 (D8)
23 (D7)
22 (D6)
21 (D5)
20 (D4)
19 (D3)
18 (D2)
17 (D1)
16 (LSB)
HARDWIRING FOR 8-BIT DATA BUSES
D7
D6
D5
D4
D3
D2
D1
D0
DATA
BU
S
MAX174
MX574A
MX674A
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