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參數(shù)資料
| 型號(hào)： | MWS5114D3 |
| 廠商： | INTERSIL CORP |
| 元件分類： | Static RAM |
| 英文描述： | 1K X 4 STANDARD SRAM, 200 ns, CDIP18 |
| 封裝： | SIDE BRAZED, CERAMIC, DIP-18 |
| 文件頁(yè)數(shù)： | 5/8頁(yè) |
| 文件大小： | 121K |
| 代理商： | MWS5114D3 |
6-164
Dynamic Electrical Specifications at TA = 0
oC to +70oC, V
DD = 5V ±5%, Input tR, tF = 10ns; CL = 50pF and 1 TTL Load
PARAMETER
SYMBOL
LIMITS
UNITS
MWS5114-3
MWS5114-2
MWS5114-1
(NOTE 1)
MIN
(NOTE 2)
TYP
MAX
(NOTE 1)
MIN
(NOTE 2)
TYP
MAX
(NOTE 1)
MIN
(NOTE 2)
TYP
MAX
READ CYCLE TIMES (FIGURE 1)
Read Cycle
tRC
200
160
-
250
200
-
300
250
-
ns
Access from
Address
tAA
-
160
200
-
200
250
-
250
300
ns
Chip Selection to
Output Valid
tCO
-
110
150
-
150
200
-
200
250
ns
Chip Selection to
Output Active
tCX
20100
-
20100
-
20100
-
ns
Output Three-State
from Deselection
tOTD
-
75
125
-
75
125
-
75
125
ns
Output Hold from
Address Change
tOHA
50
100
-
50
100
-
50
100
-
ns
WRITE CYCLE TIMES (FIGURE 2)
Write Cycle
tWC
200
160
-
250
200
-
300
220
-
ns
Write
tW
125
100
-
150
120
-
200
140
-
ns
Write Release
tWR
50
40
-
50
40
-
50
40
-
ns
Address to Chip
Select Setup Time
tACS
00
-
0
-
00
-
ns
Address to Write
Setup Time
tAW
25
20
-
50
40
-
50
40
-
ns
Data to Write
Setup Time
tDSU
75
50
-
75
50
-
75
50
-
ns
Data Hold from
Write
tDH
30
10
-
30
10
-
30
10
-
ns
NOTES:
1. Time required by a limit device to allow for the indicated function.
2. Typical values are for TA = 25
oC and nominal V
DD.
MWS5114
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| MWS5114D3X | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:1024-Word x 4-Bit LSI Static RAM |
| MWS5114E1 | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:1024-Word x 4-Bit LSI Static RAM |
| MWS5114E2 | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:1024-Word x 4-Bit LSI Static RAM |
| MWS5114E2X | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:1024-Word x 4-Bit LSI Static RAM |
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