參數(shù)資料
型號: MVTX2803AG
廠商: ZARLINK SEMICONDUCTOR INC
元件分類: 網(wǎng)絡(luò)接口
英文描述: Unmanaged 8-Port 1000 Mbps Ethernet Switch
中文描述: DATACOM, LAN SWITCHING CIRCUIT, PBGA596
封裝: 40 X 40 MM, 2.33 MM HEIGHT, MS-034, HSBGA-596
文件頁數(shù): 84/127頁
文件大?。?/td> 1706K
代理商: MVTX2803AG
MVTX2803
Data Sheet
84
Zarlink Semiconductor Inc.
10.7.4 MIIC0 – MII Command Register 0
Serial Interface Address:h603
Accessed by serial interface (R/W)
Bit [7:0] MII Data [7:0]
Note
: Before programming MII command: set FEN[6], check MIIC3, making sure no RDY, and no VALID; then
program MII command.
10.7.5 MIIC1 – MII Command Register 1
Serial Interface Address:h604
Accessed by serial interface (R/W)
Bit [7:0] MII Data [15:8]
Note
: Before programming MII command: set FEN[6], check MIIC3, making sure no RDY and no VALID; then
program MII command.
10.7.6 MIIC2 – MII Command Register 2
Serial Interface Address:h605
Accessed by serial interface (R/W)
Note: Before programming MII command: set FEN[6], check MIIC3, making sure no RDY and no VALID; then
program MII command.
Bits [1:0]:
Reserved
Bit [2]:
Support DS EF Code.
(Default 0)
0 – Disable
1 – Enable (all ports)
When 101110 is detected in DS field (TOS[7:2]), the frame priority is set for 110 and drop is set
for 0.
Bit [5:3]:
Reserved
Bit [6]:
0: Enable MII Management State Machine
(Default 0)
1: Disable MII Management State Machine
Bit [7]:
0: Enable using MCT Link List structure
1: Disable using MCT Link List structure
7
6
5
4
0
Mii OP
Register address
Bits [4:0]:
REG_AD – Register PHY Address
Bit [6:5]
OP – Operation code “10” for read command and “01” for write command
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