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參數(shù)資料
| 型號： | MVTX2602AG |
| 廠商： | ZARLINK SEMICONDUCTOR INC |
| 元件分類： | 網絡接口 |
| 英文描述： | Managed 24 Port 10/100 Mbps Ethernet Switch |
| 中文描述： | DATACOM, LAN SWITCHING CIRCUIT, PBGA553 |
| 封裝： | 37.50 X 37.50 MM, 2.33 MM HEIGHT, MS-034, HSBGA-553 |
| 文件頁數(shù)： | 57/147頁 |
| 文件大?。?/td> | 924K |
| 代理商： | MVTX2602AG |
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MVTX2602
Data Sheet
57
Zarlink Semiconductor Inc.
13.2.4 CONTROL_FRAME_REG
CPU transmit/receive switch frames. (8/16 bits)
Address = 3 (read/write)
Format:
Send frame from CPU: In sequence)
Frame Data (size should be in multiple of 8-byte)
8-byte of Frame status (Frame size, Destination port #, Frame O.K. status)
CPU Received frame: In sequence)
8-byte of Frame status (Frame size, Source port #, VLAN tag)
Frame Data
13.2.5 COMMAND&STATUS Register
CPU interface commands (write) and status
Address = 4 (read/write)
When the CPU
writes
to this register
When the CPU reads this register:
Bit [0]:
Set Control Frame Receive buffer ready after CPU writes a complete frame
into the buffer. This bit is self-cleared.
Bit [1]:
Set Control Frame Transmit buffer1 ready after CPU reads out a complete
frame from the buffer. This bit is self-cleared.
Bit [2]:
Set Control Frame Transmit buffer2 ready after CPU reads out a complete
frame from the buffer. This bit is self-cleared.
Bit [3]:
Set this bit to indicate CPU received a whole frame (transmit FIFO frame
receive done) and flushed the rest of frame fragment. This bit will be self-
cleared.
Bit [4]:
Set this bit to indicate that the following Write to the Receive FIFO is the last
one (EOF). This bit will be self-cleared.
Bit [5]:
Set this bit to re-start the data that is sent from the CPU to Receive FIFO
(re-align). This feature can be used for software debug. For normal
operation must be '0'.
Bit [6]:
Do not use. Must be '0'
Bit [7]:
Reserved
Bit [0]:
Control Frame receive buffer ready, CPU can write a new frame
1 – CPU can write a new control command 1
0 – CPU has to wait until this bit is 1 to write a new control command 1
Bit [1]:
Control Frame transmit buffer1 ready for CPU to read
1 – CPU can read a new control command 1
0 – CPU has to wait until this bit is 1 to read a new control command
相關PDF資料 |
PDF描述 |
|---|---|
| MVTX2603 | Unmanaged 24-Port 10/100 Mb + 2-Port 1 Gb Ethernet Switch |
| MVTX2603AG | Unmanaged 24-Port 10/100 Mb + 2-Port 1 Gb Ethernet Switch |
| MVTX2604 | Managed 24-Port 10/100 Mb + 2 Port 1 Gb Ethernet Switch |
| MVTX2604AG | Managed 24-Port 10/100 Mb + 2 Port 1 Gb Ethernet Switch |
| MVTX2801 | Unmanaged 4-Port 1000 Mbps Ethernet Switch |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| MVTX2602AG2 | 制造商:Microsemi Corporation 功能描述: |
| MVTX2603 | 制造商:ZARLINK 制造商全稱:Zarlink Semiconductor Inc 功能描述:Unmanaged 24-Port 10/100 Mb + 2-Port 1 Gb Ethernet Switch |
| MVTX2603A | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Unmanaged 24 port 10/100Mb + 2 port 1Gb Ethernet switch |
| MVTX2603AG | 制造商:ZARLINK 制造商全稱:Zarlink Semiconductor Inc 功能描述:Unmanaged 24-Port 10/100 Mb + 2-Port 1 Gb Ethernet Switch |
| MVTX2603AG2 | 制造商:Microsemi Corporation 功能描述: |
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