Semiconductor Components Industries, LLC, 2004
October, 2004 Rev. 7
1
Publication Order Number:
MUN5111T1/D
MUN5111T1 Series
Preferred Devices
Bias Resistor Transistor
PNP Silicon Surface Mount Transistor
with Monolithic Bias Resistor Network
This new series of digital transistors is designed to replace a single
device and its external resistor bias network. The Bias Resistor
Transistor (BRT) contains a single transistor with a monolithic bias
network consisting of two resistors; a series base resistor and a
baseemitter resistor. The BRT eliminates these individual
components by integrating them into a single device. The use of a BRT
can reduce both system cost and board space. The device is housed in
the SC70/SOT323 package which is designed for low power
surface mount applications.
Features
PbFree Packages are Available
Simplifies Circuit Design
Reduces Board Space
Reduces Component Count
The SC70/SOT323 package can be soldered using wave or reflow.
The modified gullwinged leads absorb thermal stress during
soldering eliminating the possibility of damage to the die.
Available in 8 mm embossed tape and reel Use the Device Number
Device Number to order the 13 inch/10,000 unit reel.
MAXIMUM RATINGS
(T
A
= 25
°
C unless otherwise noted)
Rating
Symbol
Value
Unit
Collector-Base Voltage
V
CBO
50
Vdc
Collector-Emitter Voltage
V
CEO
50
Vdc
Collector Current
I
C
100
mAdc
Maximum ratings are those values beyond which device damage can occur.
Maximum ratings applied to the device are individual stress limit values (not
normal operating conditions) and are not valid simultaneously. If these limits
are exceeded, device functional operation is not implied, damage may occur
and reliability may be affected.
THERMAL CHARACTERISTICS
Characteristic
Symbol
Max
Unit
Total Device Dissipation
T
A
= 25
°
C
Derate above 25
°
C
P
D
202 (Note 1)
310 (Note 2)
1.6 (Note 1)
2.5 (Note 2)
mW
°
C/W
Thermal Resistance, Junction-to-Ambient
R
JA
618 (Note 1)
403 (Note 2)
°
C/W
Thermal Resistance, Junction-to-Lead
R
JL
280 (Note 1)
332 (Note 2)
°
C/W
Junction and Storage Temperature Range
T
J
, T
stg
55 to +150
°
C
1. FR4 @ Minimum Pad
2. FR4 @ 1.0 x 1.0 inch Pad
PNP SILICON
BIAS RESISTOR
TRANSISTORS
SC70/SOT323
CASE 419
STYLE 3
Preferred
devices are recommended choices for future use
and best overall value.
3
2
1
PIN 3
COLLECTOR
(OUTPUT)
PIN 2
EMITTER
(GROUND)
PIN 1
BASE
(INPUT)
R
1
R
2
MARKING DIAGRAM
6x
= Specific Device Code
(See Order Info Table)
= Date Code
M
6x M
ORDERING INFORMATION
See specific ordering and shipping information in the package
dimensions section on page 2 of this data sheet.
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