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| 型號： | MTV212MN64 |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | 8051 Embedded Monitor Controller Flash Type with ISP |
| 中文描述： | 8051嵌入式控制器的閃存供應(yīng)商監(jiān)視器類型 |
| 文件頁數(shù)： | 6/23頁 |
| 文件大小： | 167K |
| 代理商： | MTV212MN64 |
MYSON
TECHNOLOGY
MTV212A32
(Rev. 1.2)
Revision 1.2 - 6 - 2000/07/04
3. Chip Configuration
The Chip Configuration registers define the chip pins function, as well as the functional blocks' connection,
configuration and frequency.
Reg name
PADMOD
PADMOD
PADMOD
OPTION
OPTION
XBANK
addr
30h (w)
31h (w)
32h (w)
33h (w)
34h (w)
35h (r/w)
bit7
DA13E
bit6
DA12E
P56E
IIICE
DIV253
bit5
DA11E
P55E
HLFVE
FclkE
bit4
DA10E
P54E
HLFHE
IICpass
bit3
AD3E
P53E
HCLPE
ENSCL
bit2
AD2E
P52E
P42E
Msel
bit1
AD1E
P51E
P41E
MIICF1
SlvAbs1 SlvAbs0
Xbnk1
bit0
AD0E
P50E
P40E
MIICF0
HIICE
PWMF
Xbnk2
Xbnk0
PADMOD
(w) : Pad mode control registers. (All are "0" in Chip Reset)
DA13E = 1
→
pin “P2.7/DA13” is DA13.
= 0
→
pin “P2.7/DA13” is P2.7.
DA12E = 1
→
pin “P2.6/DA12” is DA12.
= 0
→
pin “P2.6/DA12” is P2.6.
DA11E = 1
→
pin “P2.5/DA11” is DA11.
= 0
→
pin “P2.5/DA11” is P2.5.
DA10E = 1
→
pin “P2.4/DA10” is DA10.
= 0
→
pin “P2.4/DA10” is P2.4.
AD3E
= 1
→
no action
= 0
→
no action
AD2E
= 1
→
pin “P2.2/AD2” is AD2.
= 0
→
pin “P2.2/AD2” is P2.2.
AD1E
= 1
→
pin “P2.1/AD1” is AD1.
= 0
→
pin “P2.1/AD1” is P2.1.
AD0E
= 1
→
pin “P2.0/AD0” is AD0.
= 0
→
pin “P2.0/AD0” is P2.0.
P56E
= 1
→
pin “DA6/P5.6” is P5.6.
= 0
→
pin “DA6/P5.6” is DA6.
P55E
= 1
→
pin “DA5/P5.5” is P5.5.
= 0
→
pin “DA5/P5.5” is DA5.
00h
7Fh
80h
FFh
AUXRAM
Accessible by
indirect external
RAM addressing
(XBANK=0)(Using
MOVX A,@Ri
instruction)
XFR
Accessible by
indirect external
RAM addressing
(Using
MOVX A,@Ri
instruction
AUXRAM
Accessible by
indirect external
RAM addressing
(XBANK=1)(Using
MOVX A,@Ri
instruction)
00h
7Fh
80h
FFh
Internal RAM
Accessible by
indirect
addressing only
(Using
MOV A,@Ri
instruction)
Internal RAM
Accessible by
direct and indirect
addressing
SFR
Accessible by
direct addressing
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
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