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參數(shù)資料
| 型號： | MTE53N50E |
| 廠商： | MOTOROLA INC |
| 元件分類： | JFETs |
| 英文描述： | TMOS POWER FET 53 AMPERES 500 VOLTS RDS(on) = 0.080 OHM |
| 中文描述： | 53 A, 500 V, 0.08 ohm, N-CHANNEL, Si, POWER, MOSFET |
| 文件頁數(shù)： | 1/8頁 |
| 文件大?。?/td> | 167K |
| 代理商： | MTE53N50E |
1
Motorola TMOS Power MOSFET Transistor Device Data
N–Channel Enhancement–Mode Silicon Gate
This advanced high voltage TMOS E–FET is designed to
withstand high energy in the avalanche mode and switch efficiently.
This new high energy device also offers a drain–to–source diode
with fast recovery time. Designed for high voltage, high speed
switching applications such as power supplies, PWM motor
controls and other inductive loads, the avalanche energy capability
is specified to eliminate the guesswork in designs where inductive
loads are switched and offer additional safety margin against
unexpected voltage transients.
2500 V RMS Isolated Isotop Package
Avalanche Energy Specified
Source–to–Drain Diode Recovery Time Comparable to a Discrete
Fast Recovery Diode
Diode is Characterized for Use in Bridge Circuits
Very Low Internal Parasitic Inductance
IDSS and VDS(on) Specified at Elevated Temperature
U. L. Recognized, File #E69369
MAXIMUM RATINGS
(TC = 25
°
C unless otherwise noted)
Rating
Symbol
Value
Unit
Drain–Source Voltage
VDSS
VDGR
VGS
VGSM
500
Vdc
Drain–Gate Voltage (RGS = 1.0 M
)
Gate–Source Voltage — Continuous
Gate–Source Voltage
— Non–Repetitive (tp
≤
10 ms)
500
Vdc
±
20
±
40
Vdc
Vpk
Drain Current — Continuous
Drain Current
— Continuous @ 100
°
C
Drain Current
— Single Pulse (tp
≤
10
μ
s)
ID
ID
IDM
53
33
210
Adc
Total Power Dissipation
Derate above 25
°
C
PD
460
3.70
Watts
W/
°
C
Operating and Storage Temperature Range
TJ, Tstg
EAS
–40 to 150
°
C
Single Pulse Drain–to–Source Avalanche Energy
(VDD = 25 Vdc, VGS = 10 Vdc, IL= 53 Apk, L = 0.29 mH, RG =25
)
400
mJ
RMS Isolation Voltage
VISO
R
θ
JC
R
θ
JA
2500
Vac
Thermal Resistance — Junction to Case
Thermal Resistance
— Junction to Ambient
0.28
62.5
°
C/W
Maximum Lead Temperature for Soldering Purposes, 1/8
″
from case for 10 seconds
TL
260
°
C
Designer’s Data for “Worst Case” Conditions
— The Designer’s Data Sheet permits the design of most circuits entirely from the information presented. SOA Limit
curves — representing boundaries on device characteristics — are given to facilitate “worst case” design.
E–FET is a trademark of Motorola, Inc. TMOS is a registered trademark of Motorola, Inc.
ISOTOP is a trademark of SGS–THOMSON Microelectronics.
Preferred
devices are Motorola recommended choices for future use and best overall value.
REV 2
Order this document
by MTE53N50E/D
SEMICONDUCTOR TECHNICAL DATA
TMOS POWER FET
53 AMPERES
500 VOLTS
RDS(on) = 0.080 OHM
Motorola Preferred Device
D
S
G
SOT–227B
1
2
3
4
1. Source
2. Gate
3. Drain
4. Source 2
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