參數(shù)資料
型號(hào)： MT9196ASR1
廠(chǎng)商： ZARLINK SEMICONDUCTOR INC
元件分類(lèi)： 通信及網(wǎng)絡(luò)
英文描述： Integrated Digital Phone Circuit (IDPC)
中文描述： SPECIALTY TELECOM CIRCUIT, PDSO28
封裝： 0.300 INCH, LEAD FREE, MS-013AE, SOIC-28
文件頁(yè)數(shù)： 22/46頁(yè)
文件大小： 631K
代理商： MT9196ASR1
MT9196
Data Sheet
22
Zarlink Semiconductor Inc.
ADDRESS = 0Dh RESERVED
Note: Bits marked "-" are reserved bits and should be written with logic "0".
PD
Tfhp
When high, the crystal oscillator and FDI blocks are powered down. When low, the oscillator and FDI circuits are active.
When High, an additional highpass function (passband beginning at 400 Hz) is inserted into the transmit path. When
low, this highpass filter is disabled.
When high, a first order lowpass filter is inserted into the receive path (3 dB = 1.2 kHz). When low, this lowpass filter is
disabled.
When high, the receive Filter/CODEC operates on the B2-Channel. When low, the receive Filter/CODEC operates on
the B1-Channel. This control bit has significance only for ST-BUS operation and is ignored for SSI operation.
When high the received PCM stream is interrupted and replaced with quiet code; thus forcing the receive path into a
mute state. When low the full receive path functions normally.
When high the transmit PCM stream is interrupted and replaced with quiet code; thus forcing the output code into a
mute state (only the output code is muted, the transmit microphone and transmit Filter/CODEC are still functional).
When low the full transmit path functions normally.
DialEN
B2/B1
RxMUTE
TxMUTE
Control Register 1
ADDRESS = 0Eh WRITE/READ VERIFY
Power Reset Value
100X X000
7
6
5
4
3
2
1
0
PD
Tfhp
DialEN
-
B2/B1 RxMute TxMute
-
RST
When high, a software reset occurs performing the same function as the hardware reset (PWRST) except that the
microport and watchdog circuitry are not affected. A software reset can be removed only by writing this bit low or by a
PWRST. When low, the reset condition is removed.
When high, A-Law (de)coding is selected for the Filter/CODEC and DTMF generator circuits. When low,
μ
-Law
(de)coding is selected for these circuits.
When high, sign-magnitude code assignment is selected for the CODEC input/output. When low, CCITT code
assignment is selected for the CODEC input/output; true sign, inverted magnitude (
μ
-Law) or true sign, alternate digit
inversion (A-Law).
When high, the receiver driver nominal gain is set at -9.6 dB. When low, this driver nominal gain is set at -12.1 dB.
When high, the transmit amplifier nominal gain is set at 15.3 dB. When low, this amplifier nominal gain is set at
6.0 dB.
A/
μ
Smag/CCITT
RxINC
TxINC
Control Register 2
ADDRESS = 0Fh WRITE/READ VERIFY
Power Reset Value
0X00 00XX
7
6
5
4
3
2
1
0
RST
-
A/
μ
Smag/
CCITT
TxINC
-
-
RxINC
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