參數(shù)資料
型號: MT91600ANR1
廠商: ZARLINK SEMICONDUCTOR INC
元件分類: 模擬傳輸電路
英文描述: Programmable SLIC
中文描述: TELECOM-SLIC, PDSO28
封裝: 5.30 MM, LEAD FREE, MO-150AH, SSOP-28
文件頁數(shù): 14/18頁
文件大?。?/td> 315K
代理商: MT91600ANR1
MT91600
Data Sheet
14
Zarlink Semiconductor Inc.
Electrical Characteristics are over Recommended Operating Conditions unless otherwise stated.
Typical figures are at 25
°
C with nominal +5 V and are for design aid only.
Note 6: Assumes Z
o
= Z
NB
= 600
and both transmit and receive gains are programmed externally to -1 dB, i.e. Gain 2-4 = -1 dB, Gain 4-
2 = -1 dB
.
AC Electrical Characteristics
Characteristics
Sym.
Min.
Typ.
Max.
Units
Test Conditions
1
Ring Trip Detect Time
Tt
100
300
mS
2
Output Impedance at VX
10
3
Gain 4-2 @ 1 kHz
-1.3
-1
-0.8
dB
Note 6
Test circuit as Fig. 8
4
Gain Relative to 1 kHz
±
0.15
dB
300 Hz - 3400 Hz
5
Transhybrid Loss
THL
20
25
dB
Note 6
300 Hz - 3400 Hz
Test circuit as Fig. 8
6
Gain 2-4 @ 1 kHz
-1.3
-1
-0.8
dB
Note 6
Test circuit as Fig. 7
7
Gain Relative to 1 kHz
±
0.15
dB
300 Hz to 3400 Hz
8
Return Loss at 2-Wire
RL
20
30
dB
Note 6
300 Hz - 3400 Hz
Test circuit as Fig. 10
9
Total Harmonic Distortion
@2W
@VX
THD
0.3
0.3
1.0
1.0
%
%
3 dBm, 1 kHz @ 2 W
1 Vrms, 1 KHz @ 4 W
10
Common Mode Rejection
2 wire to Vx
CMR
35
42
dB
Input 0.5 Vrms, 1 KHz
Test circuit as Fig. 9
11
Longitudinal to Metallic Balance
LCL
55
dB
200 Hz to 3400 Hz
Test circuit as Fig. 9
12
Metallic to Longitudinal Balance
58
48
dB
dB
200 Hz to 1000 Hz
1000 Hz to 3400 Hz
13
Idle Channel Noise
@2W
@VX
Nc
12
12
dBrnC
dBrnC
Cmessage Filter
Cmessage Filter
14
Power Supply Rejection
Ratio at 2 W and VX
Vdd
Vee
PSRR
23
23
dB
dB
0.1Vp-p @ 1kHz
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