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參數(shù)資料
| 型號： | MT9092 |
| 廠商： | Mitel Networks Corporation |
| 英文描述： | ISO2-CMOS ST-BUS⑩ FAMILY Digital Telephone with HDLC (HPhone-II) |
| 中文描述： | ISO2 -意法半導(dǎo)體的CMOS總線⑩家庭數(shù)字與HDLC的電話（HPhone -Ⅱ） |
| 文件頁數(shù)： | 26/42頁 |
| 文件大?。?/td> | 482K |
| 代理商： | MT9092 |
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MT9092
7-28
ADDRESS 17h-1Ch are RESERVED
Note: Bits marked "-" are reserved bits and should be written with logic "0".
C-Channel Register
ADDRESS = 14h WRITE/READ
Power Reset Value
Write = 1111 1111
Read = Not Applicable
7
6
5
4
3
2
1
0
D
7
D
6
D
5
D
4
D
2
D
1
D
0
D
3
Micro-port access to the ST-BUS C-Channel information.
All bits active high:
Ch
2
EN and Ch
3
EN
Channels 2 and 3 are the B1 and B2 channels, respectively. PCM associated with the DSP, Filter/CODEC and trans-
ducer audio paths is conveyed in one of these channels as selected in the timing control register.
Transmit B1 and B2 data on DSTo
When high PCM from the Filter/CODEC and DSP is transmitted on DSTo in the associated channel. When low
DSTo is forced to logic 0 for the corresponding timeslot. If both Ch
2
EN and Ch
3
EN are enabled, data defaults to
channel 2.
Receive B1 and B2 data on DSTi
When enabled PCM from DSTi is routed to the DSP and Filter/CODEC in the associated channel. If both Ch
2
EN
and Ch
3
EN are enabled, data input defaults to channel 2.
Channel 1 conveys the control/status information for the layer 1 transceiver. The full 64kb/s bandwidth is available and
Ch
1
EN
is assigned according to which transceiver is being used. Consult the data sheets for the transceiver selected. When
high register data is transmitted on DSTo. When low this timeslot is tri-stated on DSTo. Receive C-Channel data (DSTi)
is always routed to the register regardless of this control bit's logic state.
Channel 0 conveys the D-Channel HDLC information. Since this function is dedicated to 16kb/s operation, only the first
Ch
0
EN
Timing Control Register
ADDRESS = 15h WRITE/READ VERIFY
Power Reset Value
XX0X 0000
7
6
5
4
3
2
1
0
-
-
-
-
CH
3
EN
CH
1
EN
CH
2
EN
CH
0
EN
LB
io
Active high enables data from the ST-BUS input to be looped back to the ST-BUS output directly at the pins. The DSTo tri-
state driver must also be enabled using one of the channel enable signals.
Active high enables data from ST-BUS output to be looped back to the ST-BUS input directly at the pins.
LB
oi
Loop-back Register
ADDRESS = 16h WRITE/READ VERIFY
Power Reset Value
X00X XXXX
7
6
5
4
3
2
1
0
-
LBio
LBoi
-
-
-
-
-
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| MT9094 | Digital Telephone (DPhone-II)(數(shù)字電話) |
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| MT9122AP | CMOS Dual Voice Echo Canceller with Tone Detection |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MT9092AP | 制造商:Microsemi Corporation 功能描述: |
| MT9092AP1 | 制造商:Zarlink Semiconductor Inc 功能描述:DGTL TEL 44PLCC - Rail/Tube 制造商:Zarlink Semiconductor Inc 功能描述:PB FREE H-PHONE-PLUS PLCC |
| MT9092APR | 制造商:Microsemi Corporation 功能描述:DGTL TEL 44PLCC - Tape and Reel |
| MT9092APR1 | 制造商:Microsemi Corporation 功能描述:DGTL TEL 44PLCC - Tape and Reel 制造商:MICROSEMI CONSUMER MEDICAL PRODUCT GROUP 功能描述:IC DGTL TELEPHONE CIRCUIT 44PLCC 制造商:Microsemi Corporation 功能描述:IC DGTL TELEPHONE CIRCUIT 44PLCC |
| MT9094 | 制造商:MITEL 制造商全稱:Mitel Networks Corporation 功能描述:ISO2-CMOS ST-BUS⑩ FAMILY Digital Telephone (DPhone-II) |
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