參數(shù)資料
型號(hào)： MT90869AG
廠商： ZARLINK SEMICONDUCTOR INC
元件分類： 路由/交換
英文描述： Flexible 16K Digital Switch (F16kDX)
中文描述： TELECOM, DIGITAL TIME SWITCH, PBGA272
封裝： 27 X 27 MM, 1.27 MM PITCH, PLASTIC, MS-034-BAL-2, BGA-272
文件頁(yè)數(shù)： 18/76頁(yè)
文件大?。?/td> 1316K
代理商： MT90869AG
MT90869
Data Sheet
18
Zarlink Semiconductor Inc.
Figure 11 - Backplane and Local Input Bit Delay Timing Diagram for Data Rate of 8Mb/s
3.3
Output Advancement Programming (Backplane and Local Output Streams)
This feature is used to advance the output channel alignment of individual local or backplane output streams with
respect to the frame boundary. Each output stream has its own advancement value which can be programmed by
the output advancement registers. The output advancement selection is useful in compensating for various parasitic
loading on the serial data output pins.
3.3.1
Local Output Advancement Programming
The local output advancement registers,
LOAR0-31
, are used to control the local output advancement. The
advancement is determined with reference to the internal system clock rate (131.072MHz). For 2Mb/s, 4Mb/s, 8Mb/s
or 16Mb/s streams the advancement may be 0, -2 cycles, -4 cycles or -6 cycles, which converts to approximately
0ns, -15ns, -30ns or -45ns as shown in Figure 12.
3.3.2
Backplane Output Advancement Programming
The backplane output advancement registers,
BOAR0-31
are used to control the backplane output advancement.
The advancement is determined with reference to the internal system clock rate (131.072MHz). For 2Mb/s, 4Mb/s,
8Mb/s or 16Mb/s streams the advancement may be 0, -2 cycles, -4 cycles or -6 cycles, which converts to
approximately 0ns, -15ns, -30ns or -45ns as shown in Figure 12. For 32Mb/s streams, the advancement may be 0,
-1 cycle, -2 cycles or -3 cycles, which converts to approximately 0ns, -7ns, -15ns or -22ns.
C8o
7
2
3
4
5
6
1
0
BSTi0-31/LSTi0-31
Bit Delay = 0
Ch0
7
4
5
6
Ch1
2
3
1
0
BSTi0-31/LSTi0-31
Bit Delay = 1/4
7
2
3
4
5
6
1
0
BSTi0-31/LSTi0-31
Bit Delay = 1
Ch0
7
5
6
Ch1
2
3
1
0
(Default)
7
2
3
4
5
6
1
0
Ch0
7
4
5
6
Ch1
2
3
1
0
Ch127
Ch127
Ch127
Bit Delay, 1/4
Bit Delay, 1
BSTi0-31/LSTi0-31
Bit Delay = 1/2
7
2
3
4
5
6
1
0
Ch0
7
4
5
6
Ch1
2
3
1
0
Ch127
Bit Delay, 1/2
BSTi0-31/LSTi0-31
Bit Delay = 3/4
7
2
3
4
5
6
1
0
Ch0
7
4
5
6
Ch1
2
3
1
0
Ch127
Bit Delay, 3/4
BSTi0-31/LSTi0-31
Bit Delay = 7
1/2
7
2
3
4
5
6
1
0
Ch127
7
4
5
6
Ch0
2
1
0
Ch126
Bit Delay, 7
1/2
BSTi0-31/LSTi0-31
Bit Delay = 7
3/4
7
2
3
4
5
6
1
0
Ch127
7
4
5
6
Ch0
2
1
0
Ch126
Bit Delay, 7
3/4
FP8o
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參數(shù)描述
MT90869AG2 制造商:Microsemi Corporation 功能描述:PB FREE 8K X 8K DIGITAL SWITCH 制造商:Microsemi Corporation 功能描述:SWIT FABRIC 16KX16K/8KX8K 1.8V/3.3V 272BGA - Trays 制造商:MICROSEMI CONSUMER MEDICAL PRODUCT GROUP 功能描述:IC DGTL SWITCH F16KDX 272PBGA 制造商:Microsemi Corporation 功能描述:IC DGTL SWITCH F16KDX 272PBGA
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