參數(shù)資料
型號(hào)： MT9075AP
廠商： Mitel Networks Corporation
英文描述： E1 Single Chip Transceiver
中文描述： 素E1單芯片收發(fā)器
文件頁(yè)數(shù)： 57/78頁(yè)
文件大?。?/td> 1008K
代理商： MT9075AP
Preliminary Information
MT9075A
4-185
Table 79 - HDLC Address Recognition Register1
(Page 0BH & 0CH, Address 10H)
Bit
Name
Functional Description
7 - 2
Adr16
-
Adr11
A six bit mask used to interrogate
the first byte of the received
address. Adr16 is the MSB.
1
Adr10
This bit is used in address
comparison, if control bit Seven, bit
4 of HDLC Control Register 2
(address 15H) is one.
0
A1en
When this bit is high, this six (or
seven) bit mask is used in address
comparison of the first address
byte.
If address recognition is enabled,
any packet failing the address
comparison will not be stored in the
RX FIFO. A1en must be high for All-
call (1111111) address recognition
for single byte address. When this
bit is low, this bit mask is ignored in
address comparison
Bit
Name
Functional Description
7 - 1
Ad26
-
Ad20
A
interrogate the second byte of the
received address. Adr26 is MSB.
This mask is ignored (as well as first
byte mask) if all call address
(1111111) is received.
seven
bit
mask
used
to
0
A2en
When this bit is one, this seven bit
mask
is
used
comparison of the second address
byte.
If address recognition is enabled,
any packet failing the address
comparison will not be stored in the
Rx FIFO. A2en must be one for All-
call address recognition. When this
bit is zero, this bit mask is ignored in
address comparison
in
address
Table 80 - HDLC Address Recognition Register 2
(Pages 0BH & 0CH, Address 11H)
Bit
Name
Functional Description
7 - 0
Bit7
-
Bit0
This eight bit word is tagged with
the two status bits (EOP and FA)
from the Control Register 1, and the
resulting 10 bit word is written to the
TX FIFO. The FIFO status is not
changed immediately after a write
or read occurs. It is updated after
the data and the read/write pointers
have settled.
Table 81 - TX FIFO Write Register
(Pages 0BH & 0CH, Address 12H)
Bit
Name
Functional Description
7 - 0
Bit7
-
Bit0
This is the received data byte read
from the RX FIFO. The status bits of
this byte can be read from the
status register. The FIFO status is
not changed immediately when a
write or read occurs. It is updated
after the data and the read/write
pointers have settled.
Table 82 - RX FIFO Read Register
(Pages 0BH & 0CH, Address 12H)
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
MT9075B 制造商:ZARLINK 制造商全稱:Zarlink Semiconductor Inc 功能描述:E1 Single Chip Transceiver
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MT9075BP 制造商:Microsemi Corporation 功能描述:
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