參數(shù)資料
型號(hào)： MT90210AL
廠商： Mitel Networks Corporation
英文描述： Multi-Rate Parallel Access Circuit
中文描述： 多速率電路并行訪問
文件頁數(shù)： 10/27頁
文件大?。?/td> 133K
代理商： MT90210AL
MT90210
Preliminary Information
2-154
Instruction Register
In accordance with the IEEE 1149.1 standard, the
MT90210 uses public instructions listed in Table 1.
The MT90210 JTAG Interface contains a two bit
instruction register. Instructions are serially loaded
into the Instruction Register from the TDI when the
TAP Controller is in its Shift-IR state. Subsequently,
the instructions are decoded to achieve two basic
functions: to select the test data register that may
operate while the instruction is current and to define
the serial test data register path that is used to shift
data between TDI and TDO during data register
scanning.
Test Data Registers
As specified in the IEEE 1149.1 Standard, the
MT90210 JTAG interface contains two test data
registers:
The Boundary Scan Register
The Bypass Register
The MT90210 boundary-scan register contains 144
bits. Bit 144 in Table 2 is the first bit clocked out. All
tristate enable bits are asserted high: a logic 1
enables
the
corresponding
outputs/bidirectionals. Note that clocking all zeros
into the scan path register will set all outputs to
tristate.
group
of
Table 2 - Boundary Scan Register
B - bidirectional: input cell, output cell followed by
tristate cell.
I - input: input cell.
O - output: output cell, followed by tristate cell.
Bits
Definition
BSC Type
1:60
S4 - S23
B
61
RDIN
I
62
OEser
I
63
SCLK
I
64
HC4
I
65
F0i
I
66:68
MD2 - MD0
I
69
RST
I
70
PCLK
I
71:72
CKO
O
73:76
R/W1 - R/W2
O
77:100
P0 - P7
B
101:102
Strobe
O
103:128
A0 - A12
O
129:130
RBC
O
131:132
WBC
O
133:144
S0 - S3
B
I[0:1]
Instruction
Description
[00]
EXTEST
Boundary-Scan
register selected,
Test Enabled
This instruction is specifically provided to allow board-level interconnect
testing of opens, bridging errors etc.
When the EXTEST instruction is selected, the on-chip logic is isolated
from the MT90210’s I/O pin such that the value of the I/O pins is
determined by its boundary-scan register. Data for the execution of this
instruction can be preloaded into the boundary-scan register with the
SAMPLE/PRELOAD instruction.
Two functions can be performed by the use of this instruction. It allows a
SAMPLE (‘snapshot’) of the normal operation of the MT90210 to be
taken for examination. And, prior to the selection of another test
operation, a PRELOAD can place data values into the latched parallel
outputs of the Boundary-Scan cells. During the execution of the
instruction, the on-chip logic operation is not hampered in any way.
This instruction is used to BYPASS the MT90210 while performing
boundary-scan testing on other devices with scan registers in the same
serial register chain. The MT90210 is allowed to function normally. This
instruction is automatically loaded upon reset of the MT90210, as
specified in IEEE1149.1
Table1 - Instruction Register
[01],
[10]
SAMPLE/
PRELOAD
Boundary-Scan
register selected,
Test Disabled
[11]
BYPASS/
NOTEST
Bypass register
selected,
Test Disabled
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