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參數(shù)資料
| 型號(hào)： | MT89L80 |
| 廠商： | Mitel Networks Corporation |
| 英文描述： | Digital Switch(數(shù)字開(kāi)關(guān)) |
| 中文描述： | 數(shù)字開(kāi)關(guān)（數(shù)字開(kāi)關(guān)） |
| 文件頁(yè)數(shù)： | 7/15頁(yè) |
| 文件大?。?/td> | 75K |
| 代理商： | MT89L80 |
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Advance Information
MT89L80
2-9
If bit 6 of the Control Register is 0, then bits 2 and 0
of each Connection Memory High location function
normally (see Fig. 5). If bit 2 is 1, the associated ST-
BUS output channel is in Message Mode; i.e., the
byte in the corresponding Connection Memory Low
location is transmitted on the stream at that channel.
Otherwise, one of the bytes received on the serial
inputs is transmitted and the contents of the
Connection Memory Low define the ST-BUS input
stream and channel where the byte is to be found
(see Fig. 6).
If the ODE pin is low, then all serial outputs are high-
impedance. If it is high and bit 6 in the Control
Register is 1, then all outputs are active. If the ODE
pin is high and bit 6 in the Control Register is 0, then
the bit 0 in the Connection Memory High location
enables the output drivers for the corresponding
individual ST-BUS output stream and channel. Bit
0=1 enables the driver and bit 0=0 disables it (see
Fig. 5).
Bit 1 of each Connection Memory High location (see
Fig. 5) is output on the CSTo pin once every frame.
To allow for delay in any external control circuitry the
bit is output one channel before the corresponding
channel on the ST-BUS streams, and the bit for
stream 0 is output first in the channel; e.g., bit 1’s for
channel 9 of streams 0-7 are output synchronously
with ST-BUS channel 8 bits 7-0.
Applications
Use in a Simple Digital Switching System
Figs. 7 and 8 show how MT89L80s can be used with
MT8964s to form a simple digital switching system.
Fig. 7 shows the interface between the MT89L80s
and the filter/codecs. Fig. 8 shows the position of
these components in an example architecture.
The MT8964 filter/codec in Fig. 7 receives and
transmits digitized voice signals on the ST-BUS input
D
R
, and ST-BUS output D
X
, respectively. These
signals are routed to the ST-BUS inputs and outputs
on the top MT89L80, which is used as a digital
speech switch.
The MT8964 is controlled by the ST-BUS input D
C
originating from the bottom MT89L80, which
generates the appropriate signals from an output
channel in Message Mode. This architecture
optimizes the messaging capability of the line circuit
by building signalling logic, e.g., for on-off hook
detection, which communicates on an ST-BUS
output. This signalling ST-BUS output is monitored
by a microprocessor (not shown) through an ST-BUS
input on the bottom MT89L80.
Fig. 8 shows how a simple digital switching system
may be designed using the ST-BUS architecture.
This is a private telephone network with 256
extensions which uses a single MT89L80 as a
speech switch and a second MT89L80 for
communication with the line interface circuits.
Figure 7 - Example of Typical Interface between 89L80s and 8964s for Simple Digital Switching System
89L80 used
as
speech
switch
MT89L80
STo0
STi0
STo0
STi0
MT89L80
89L80 used
in message
mode for
control and
signalling
D
X
D
R
D
C
MT8964
Filter/Codec
Signalling
Logic
Line Driver
and
2- to 4-
Wire
Converter
Line Interface Circuit with 8964 Filter/Codec
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