參數(shù)資料
型號(hào): MT8979AP
廠商: Mitel Networks Corporation
元件分類: 通信及網(wǎng)絡(luò)
英文描述: Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0
中文描述: Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0
文件頁數(shù): 17/26頁
文件大?。?/td> 340K
代理商: MT8979AP
ISO-CMOS
MT8979
4-177
Table 16. CRC Error Count: Data Format for CSTo Channel 20
Table 17. Master Status Word 2 (MSW2): Data Format for CSTo Channel 21
Applications
BIT
NAME
DESCRIPTION
7 - 0
CERC
CRC Error Counter:
This byte is the CRC error counter. The counter will wrap around
once it reaches FF count. If maintenance option is activated, the counter will reset after a
one second interval.
BIT
NAME
DESCRIPTION
7
Si2
The received Si bit in frame 15 is reported in this bit. Si2 will be updated after each
RxMF pulse (pin 23).
6
Si1
The received Si bit in frame 13 is reported in this bit. Si1 will be updated after each
RxMF pulse (pin 23).
5-4
NA
Unused.
3
CRCTimer
CRC Timer:
Transition from 1 to 0 indicates the start of one second interval in which
CRC errors are accumulated. This bit stays high for 8 ms.
2
CRCRef
CRC Reframe:
A ’1’ indicates that the receive CRC multiframe synchronization could
not be found within the time out period of 8 ms after detecting frame synchronization.
This bit will go low if CRCSync goes low or if Maintenance is not activated.
1
CRCSync
CRC Sync:
A ’0’ indicates that CRC multiframing has been detected.
0
FrmPhase
Frame Count:
This is the ninth and most significant bit (b8) of the Phase Status Word
(see Table 15). If the phase status word is incrementing, this bit will toggle when the
phase reading exceeds ST-BUS channel 31, bit 7. If the phase word is decrementing,
then this bit will toggle when the reading goes below ST-BUS channel 0, bit 0.
The MT8979 is only a link interface to the CEPT
trunk. As such, an external line driver and receiver is
required along with an appropriate pulse transformer
before being connected to the line.
Transmitter
In order to generate a bipolar line signal, the link
interface to the MT8979 provides the user with two
bipolar steering outputs, TxA and TxB. These
correspond to the required positive and negative
pulses on the transmission line. Figure 14 shows a
recommended output circuit for driving a line pulse
transformer.
The transistors are driven into saturation when they
are turned on, which applies a step function to the
transformer. The step input to the transformer
produces a nearly constant di/dt before the current
reaches steady state. By operating in the transient
portion of the inductance response, the secondary of
the transformer produces an almost square pulse.
The base terminal of the transistors is AC coupled to
the MT8979 so that there is no DC path from V
DD
to
ground.
Figure 14 - Bipolar Line Driver
TxA
TxB
MT8979
+12V
33
μ
H
47μ
F
TIPo
RINGo
:.5
1.:
1.:
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