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MT8979
ISO-CMOS
4-176
Table 13. Received Non-Frame Alignment Signal: Data Format for CSTo Channel 17
Table 14. Master Status Word 1 (MSW1): Data Format for CSTo Channel 18
Table 15. Phase Status Word (PSW): Data Format for CSTo Channel 19
BIT
NAME
DESCRIPTION
7
IU1
International Use 1:
This is the bit which is received from the CEPT 2048 kbit/s link in
bit position 1 of timeslot 0 of non-frame-alignment frames . It is reserved for the CRC
framing or as international bits.
6
NFAF
Receive Non-Frame Alignment Bit:
This is the bit which is received from the CEPT
2048 kbit/s link in bit position 2 of timeslot 0 of non-frame-alignment frames . This bit
should be ‘1‘ in order to differentiate between frame-alignment frames and
non-frame-alignment frames.
5
ALM
Non-Frame Alignment Alarm:
This is the bit which is received from the CEPT 2048
kbit/s link in bit position 3 of timeslot 0 of non-frame-alignment frames . It is used to signal
an alarm from the remote end of the CEPT link. This bit should have the value ‘0‘ under
normal operation and should go to ‘1 ‘to signal an alarm.
4-0
NU1-5
National Use:
These are the bits which are received on the CEPT 2048 kbit/s link in bit
positions 4 to 8 of timeslot 0 of non-frame-alignment frames . These bits are reserved for
national use, and on crossing international borders they should have the value ‘1‘.
BIT
NAME
DESCRIPTION
7
TFSYN
Frame Sync:
This bit goes to ‘1‘ to indicate a loss of frame alignment synchronization by
the MT8979. It goes to ‘0‘ when frame synchronization is detected.
6
MFSYN
Multiframe Sync:
This bit goes to ‘1‘ to indicate a loss of multiframe synchronization by
the MT8979. It goes to ‘0‘ when multiframe synchronization is detected.
5
ERR
Frame Alignment Error:
This bit changes state when 16 or more errors have been
detected in the frame alignment signal. It will not change state more than once every 128
ms.
4
SLIP
Control Slip:
This bit changes state when a slip occurs between the received CEPT
2048 kbit/s link and the 2048 kbit/s ST-BUS.
3
RXAIS
Receive Alarm Indication Signal:
This bit goes to ‘1‘ to signal that an all-ones alarm
signal has been detected on the received CEPT 2048 kbit/s . It goes to ’0’ when the
all-ones alarm signal is removed.
2
RXTS16AIS
Receive Timeslot 16 Alarm Indication Signal:
This bit goes to ‘1‘ to signal that an
all-ones alarm signal has been detected on channel 16 of the received CEPT 2048 kbit/s
link. It goes to ’0’ when the all-ones alarm signal is removed.
1
XS
External Status:
This bit contains the data sampled once per frame at the XS pin.
0
N/A
(Unused).
BIT
NAME
DESCRIPTION
7 - 3
TxTSC
Transmit Timeslot Count:
The value of these five bits indicate the timeslot count
between the ST-BUS frame pulse and the rising edge of E8Ko.
2 - 0
TxBTC
Transmit Bit Count:
The value of these three bits indicate the bit position within the
timeslot count reported in TxTSC above.