參數(shù)資料
型號(hào)： MT88L85
廠商： Mitel Networks Corporation
英文描述： 3V Integrated DTMFTransceiver with Power Down & Adaptive Micro Interface
中文描述： 3V的集成DTMFTransceiver與掉電
文件頁(yè)數(shù)： 11/20頁(yè)
文件大?。?/td> 350K
代理商： MT88L85
Advance Information
MT88L85
4-81
Table 7
.
Control Register B Description
Table 8
.
Status Register Description
BIT
NAME
DESCRIPTION
b0
BURST
Burst Mode Select. A logic high de-activates burst mode; a logic low enables burst mode.
When activated, the digital code representing a DTMF signal (see Table 1) can be written
to the transmit register, which will result in a transmit DTMF tone burst and pause of equal
durations (typically 51 msec). Following the pause, the status register will be updated (b1 -
Transmit Data Register Empty), and an interrupt will occur if the interrupt mode has been
enabled.
When CP mode (control register A, b1) is enabled the normal tone burst and pause
durations are extended from a typical duration of 51 msec to 102 msec.
When BURST is high (de-activated) the transmit tone burst duration is determined by the
TOUT bit (control register A, b0).
b1
RxEN
This bit enables the DTMF and Call Progress Tone receivers. A logic low enables both
circuits. A logic high deactivates and puts both receiver circuits into power down mode.
b2
S/D
Single or Dual Tone Generation. A logic high selects the single tone output; a logic low
selects the dual tone (DTMF) output. The single tone generation function requires further
selection of either the row or column tones (low or high group) through the C/R bit (control
register B, b3).
b3
C/R
Column or Row Tone Select. A logic high selects a column tone output; a logic low selects
a row tone output. This function is used in conjunction with the S/D bit (control register B,
b2).
BIT
NAME
STATUS FLAG SET
STATUS FLAG CLEARED
b0
IRQ
Interrupt has occurred. Bit one
(b1) or bit two (b2) is set.
Interrupt is inactive. Cleared after
Status Register is read.
b1
TRANSMIT DATA
REGISTER EMPTY
(BURST MODE ONLY)
Pause duration has terminated
and transmitter is ready for new
data.
Cleared after Status Register is
read or when in non-burst mode.
b2
RECEIVE DATA REGISTER
FULL
Valid data is in the Receive Data
Register.
Cleared after Status Register is
read.
b3
DELAYED STEERING
Set upon the valid detection of
the absence of a DTMF signal.
Cleared upon the detection of a
valid DTMF signal.
相關(guān)PDF資料
PDF描述
MT88L85AE 3V Integrated DTMFTransceiver with Power Down & Adaptive Micro Interface
MT88L85AN 3V Integrated DTMFTransceiver with Power Down & Adaptive Micro Interface
MT88L85AP 3V Integrated DTMFTransceiver with Power Down & Adaptive Micro Interface
MT88L89 3V Integrated DTMFTransceiver with Adaptive Micro Interface
MT88L89AC 3V Integrated DTMFTransceiver with Adaptive Micro Interface
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
MT88L85AE 制造商:MITEL 制造商全稱:Mitel Networks Corporation 功能描述:3V Integrated DTMFTransceiver with Power Down & Adaptive Micro Interface
MT88L85AE1 制造商:Microsemi Corporation 功能描述:DTMF TXRX 3.58MHZ CMOS 3V 24PDIP - Rail/Tube 制造商:MICROSEMI CONSUMER MEDICAL PRODUCT GROUP 功能描述:IC TXRX DTMF 3V 24PDIP 制造商:Microsemi Corporation 功能描述:IC TXRX DTMF 3V 24PDIP
MT88L85AN 制造商:Microsemi Corporation 功能描述:
MT88L85AN1 制造商:Microsemi Corporation 功能描述:DTMF TXRX 3.58MHZ CMOS 3V 24SSOP - Rail/Tube 制造商:Microsemi Corporation 功能描述:3V DTMF TRANSCEIVER
MT88L85ANR 制造商:Microsemi Corporation 功能描述:
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