參數(shù)資料
型號(hào): MT8885AP
廠商: Mitel Networks Corporation
英文描述: Integrated DTMFTransceiver with Power Down & Adaptive Micro Interface
中文描述: 綜合DTMFTransceiver與掉電
文件頁數(shù): 13/20頁
文件大?。?/td> 350K
代理商: MT8885AP
Advance Information
MT8885
4-63
Figure 14 - Application Notes
INITIALIZATION PROCEDURE
A software reset must be included at the beginning of all programs to initialize the control registers after
power up.
Description:
Motorola Intel
R/W
1
0
0
0
0
1
Data
b2
X
0
0
0
0
X
RS0
1
1
1
1
1
1
WR RD
1
0
0
0
0
1
b3
X
0
0
1
0
X
b1
X
0
0
0
0
X
b0
X
0
0
0
0
X
1) Read Status Register
2) Write to Control Register
3) Write to Control Register
4) Write to Control Register
5) Write to Control Register
6) Read Status Register
0
1
1
1
1
0
TYPICAL CONTROL SEQUENCE FOR BURST MODE APPLICATIONS
Transmit DTMF tones of 50 ms burst/50 ms pause and Receive DTMF Tones.
Sequence:
RS0
1
R/W
0
WR RD
0
b3
1
b2
1
b1
0
b0
1
1) Write to Control Register A
(tone out, DTMF, IRQ, Select Control Register B)
2) Write to Control Register B
(burst mode)
3) Write to Transmit Data Register
(send a digit 7)
4) Wait for an Interrupt or Poll Status Register
5) Read the Status Register
1
1
0
0
1
0
0
0
0
0
0
0
1
0
1
1
1
1
1
1
0
X
X
X
X
-if bit 1 is set, the Tx is ready for the next tone, in which case ...
Write to Transmit Register
(send a digit 5)
0
0
0
1
0
1
0
1
-if bit 2 is set, a DTMF tone has been received, in which case ....
Read the Receive Data Register
0
1
1
0
X
X
X
X
-if both bits are set ...
Read the Receive Data Register
Write to Transmit Data Register
0
0
1
0
1
0
0
1
X
0
X
1
X
0
X
1
NOTE: IN THE TX BURST MODE, STATUS REGISTER BIT 1 WILL NOT BE SET UNTIL 100 ms ( ±2 ms) AFTER THE DATA IS
WRITTEN TO THE TX DATA REGISTER. IN EXTENDED BURST MODE THIS TIME WILL BE DOUBLED TO 200 ms (± 4 ms)
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