參數(shù)資料
型號: MT8880CE-1
廠商: Mitel Networks Corporation
英文描述: ISO2-CMOS Integrated DTMFTransceiver
中文描述: ISO2 - CMOS集成DTMFTransceiver
文件頁數(shù): 12/18頁
文件大?。?/td> 312K
代理商: MT8880CE-1
MT8880C/MT8880C-1
ISO
2
-CMOS
4-44
Figure 15 - MT8880C/C-1 to 6802 Interface
Figure 16 - Application Hints
IRQ
Address
VMA
R/W
E
Data
Peripheral decode
+5V
3.3k
IRQ
RS0
CS
R/W
Φ
2
Data
6802
MT8880C/C-1
EXAMPLE 1:
A software reset must be included at the beginning of all programs to initialize the control
registers after power up. The initialization procedure should be implemented 100ms after power up.
Description
CS
1) Read Status Register
0
2) Write to Control Register
0
3) Write to Control Register
0
4) Write to Control Register
0
5) Write to Control Register
0
6) Read Status Register
0
EXAMPLE 2:
Transmit DTMF tones of 50 ms burst/50 ms pause and Receive DTMF Tones
Description
CS
1) Write to Control Register A
0
(tone out, DTMF, IRQ, Select Control Register B)
2) Write to Control Register B
0
(burst mode)
3) Write to Transmit Data Register
0
(send a digit 7)
--------------------------------------wait for an interrupt or poll Status Register ----------------------------------------------
4) Read the Status Register
0
Control
RS0
1
1
1
1
1
1
Data
b2
X
0
0
0
0
X
R/W
1
0
0
0
0
1
b3
X
0
0
1
0
X
b1
X
0
0
0
0
X
b0
X
0
0
0
0
X
RS0
1
R/W
0
b3
1
b2
1
b1
0
b0
1
1
0
0
0
0
0
0
0
0
1
1
1
1
1
X
X
X
X
-if bit 1 is set, the Tx is ready for the next tone, in which case...
Write to Transmit Register
(send a digit 5)
0
0
0
0
1
0
1
-if bit 2 is set, a DTMF tone has been received, in which case....
Read the Receive Data Register
0
0
1
X
X
X
X
-if both bits are set...
Read the Receive Data Register
Write to Transmit Data Register
NOTE: IN THE TX BURST MODE, STATUS REGISTER BIT 1 WILL NOT BE SET UNTIL 100 ms (±2 ms) AFTER THE DATA IS
WRITTEN TO THE TX DATA REGISTER. IN EXTENDED BURST MODE THIS TIME WILL BE DOUBLED TO 200 ms (± 4 ms)
.
0
0
0
0
1
0
X
0
X
1
X
0
X
1
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