參數(shù)資料
型號(hào): MT8870DN
廠商: Mitel Networks Corporation
英文描述: ISO2-CMOS Integrated DTMF Receiver
中文描述: ISO2 - CMOS集成雙音多頻接收器
文件頁(yè)數(shù): 10/12頁(yè)
文件大?。?/td> 215K
代理商: MT8870DN
MT8870D/MT8870D-1
ISO
2
-CMOS
4-20
Typical figures are at 25°C and are for design aid only: not guaranteed and not subject to production testing.
*NOTES:
1.
2.
Used for guard-time calculation purposes only.
These, user adjustable parameters, are not device specifications. The adjustable settings of these minimums and maximums
are recommendations based upon network requirements.
With valid tone present at input, t
PU
equals time from PDWN going low until ESt going high.
3.
Figure 10 - Single-Ended Input Configuration
AC Electrical Characteristics
- V
DD
=5.0V±5%, V
SS
=0V, -40°C
To
+85°C , using Test Circuit shown in Figure 10.
Characteristics
Sym
Min
Typ
Max
Units
Conditions
1
T
I
M
I
N
G
Tone present detect time
t
DP
t
DA
t
REC
t
REC
t
ID
t
DO
t
PQ
t
PStD
t
QStD
t
PTE
5
11
14
ms
Note 1
2
Tone absent detect time
0.5
4
8.5
ms
Note 1
3
Tone duration accept
40
ms
Note 2
4
Tone duration reject
20
ms
Note 2
5
Interdigit pause accept
40
ms
Note 2
6
Interdigit pause reject
20
ms
Note 2
7
O
U
T
P
U
T
S
Propagation delay (St to Q)
8
11
μ
s
TOE=V
DD
TOE=V
DD
TOE=V
DD
load of 10 k
,
50 pF
8
Propagation delay (St to StD)
12
16
μ
s
9
Output data set up (Q to StD)
3.4
μ
s
10
Propagation delay (TOE to Q ENABLE)
50
ns
11
Propagation delay (TOE to Q DISABLE)
t
PTD
300
ns
load of 10 k
,
50 pF
12
P
D
W
N
Power-up time
t
PU
t
PD
30
ms
Note 3
13
Power-down time
20
ms
14
C
L
O
C
K
Crystal/clock frequency
f
C
3.5759
3.5795
3.5831
MHz
15
Clock input rise time
t
LHCL
t
HLCL
DC
CL
C
LO
110
ns
Ext. clock
16
Clock input fall time
110
ns
Ext. clock
17
Clock input duty cycle
40
50
60
%
Ext. clock
18
Capacitive load (OSC2)
30
pF
IN+
IN-
GS
V
Ref
INH
PDWN
OSC 1
OSC 2
V
SS
TOE
V
DD
St/GT
ESt
StD
Q4
Q3
Q2
Q1
DTMF
Input
C
1
R
1
R
2
X-tal
V
DD
C
2
R
3
NOTES:
R
1
,R
2
=100K
±
1%
R
3
=300K
±
1%
C
1
,C
2
=100 nF
±
5%
X-tal=3.579545 MHz
±
0.1%
MT8870D/MT8870D-1
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