
ISO
2
-CMOS
MT8870D/MT8870D-1
4-15
Power-down and Inhibit Mode
A logic high applied to pin 6 (PWDN) will power down
the device to minimize the power consumption in a
standby mode. It stops the oscillator and the
functions of the filters.
Inhibit mode is enabled by a logic high input to the
pin 5 (INH). It inhibits the detection of tones
representing characters A, B, C, and D. The output
code will remain the same as the previous detected
code (see Table 1).
Differential Input Configuration
The input arrangement of the MT8870D/MT8870D-1
provides a differential-input operational amplifier as
well as a bias source (V
Ref
) which is used to bias the
inputs at mid-rail. Provision is made for connection of
a feedback resistor to the op-amp output (GS) for
adjustment of gain. In a single-ended configuration,
the input pins are connected as shown in Figure 10
with the op-amp connected for unity gain and V
Ref
biasing the input at
1
/
2
V
DD
. Figure 6 shows the
differential
configuration,
adjustment of gain with the feedback resistor R
5
.
which
permits
the
Crystal Oscillator
The internal clock circuit is completed with the
addition of an external 3.579545 MHz crystal and is
normally connected as shown in Figure 10 (Single-
Ended Input Configuration). However, it is possible
to configure several MT8870D/MT8870D-1 devices
employing only a single oscillator crystal. The
oscillator output of the first device in the chain is
coupled through a 30 pF capacitor to the oscillator
input (OSC1) of the next device. Subsequent devices
are connected in a similar fashion. Refer to Figure 7
for
details.
The
problems
unbalanced loading are not a concern with the
arrangement
shown,
i.e.,
capacitors are not required.
associated
with
precision
balancing
Figure 6 - Differential Input Configuration
Figure 7 - Oscillator Connection
Table 2. Recommended Resonator Specifications
Note: Qm=quality factor of RLC model, i.e., 1/2
Π
R1C1.
Parameter
Unit
Resonator
R1
L1
C1
C0
Qm
f
Ohms
mH
pF
pF
-
%
10.752
.432
4.984
37.915
896.37
±0.2%
C
1
R
1
C
2
R
4
R
3
IN+
IN-
+
-
R
5
GS
R
2
V
Ref
MT8870D/
MT8870D-1
Differential Input Amplifier
C
1
=C
2
=10 nF
R
1
=R
=R
=100 k
R
2
=60k
, R
3
=37.5 k
R
2
R
5
R
2
+R
5
VOLTAGE GAIN (A
v
diff)=R
5
All resistors are
±
1% tolerance.
All capacitors are
±
5% tolerance.
R
3
=
R
1
INPUT IMPEDANCE
(Z
INDIFF
) = 2
R
12
+
1
ω
c
2
OSC1
OSC2
OSC2
OSC1
C
X-tal
C
To OSC1 of next
MT8870D/MT8870D-1
C=30 pF
X-tal=3.579545 MHz