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    參數(shù)資料
    型號: MT80C51T-16R
    廠商: TEMIC SEMICONDUCTORS
    元件分類: 微控制器/微處理器
    英文描述: 8-BIT, MROM, 16 MHz, MICROCONTROLLER, PQFP44
    文件頁數(shù): 101/170頁
    文件大?。?/td> 4133K
    代理商: MT80C51T-16R
    36
    ATtiny4/5/9/10 [DATASHEET]
    8127F–AVR–02/2013
    0x000B
    RESET: ldi
    r16, high(RAMEND); Main program start
    0x000C
    out
    SPH,r16
    ; Set Stack Pointer
    0x000D
    ldi
    r16, low(RAMEND) ; to top of RAM
    0x000E
    out
    SPL,r16
    0x000F
    sei
    ; Enable interrupts
    0x0010
    <instr>
    ...
    9.2
    External Interrupts
    External Interrupts are triggered by the INT0 pin or any of the PCINT3..0 pins. Observe that, if enabled, the inter-
    rupts will trigger even if the INT0 or PCINT3..0 pins are configured as outputs. This feature provides a way of
    generating a software interrupt. Pin change 0 interrupts PCI0 will trigger if any enabled PCINT3..0 pin toggles. The
    PCMSK Register controls which pins contribute to the pin change interrupts. Pin change interrupts on PCINT3..0
    are detected asynchronously, which means that these interrupts can be used for waking the part also from sleep
    modes other than Idle mode.
    The INT0 interrupt can be triggered by a falling or rising edge or a low level. This is set up as shown in “EICRA –
    External Interrupt Control Register A” on page 37. When the INT0 interrupt is enabled and configured as level trig-
    gered, the interrupt will trigger as long as the pin is held low. Note that recognition of falling or rising edge interrupts
    on INT0 requires the presence of an I/O clock, as described in “Clock System” on page 17.
    9.2.1
    Low Level Interrupt
    A low level interrupt on INT0 is detected asynchronously. This means that the interrupt source can be used for
    waking the part also from sleep modes other than Idle (the I/O clock is halted in all sleep modes except Idle).
    Note that if a level triggered interrupt is used for wake-up from Power-down, the required level must be held long
    enough for the MCU to complete the wake-up to trigger the level interrupt. If the level disappears before the end of
    the Start-up Time, the MCU will still wake up, but no interrupt will be generated. The start-up time is defined as
    If the low level on the interrupt pin is removed before the device has woken up then program execution will not be
    diverted to the interrupt service routine but continue from the instruction following the SLEEP command.
    9.2.2
    Pin Change Interrupt Timing
    A timing example of a pin change interrupt is shown in Figure 9-1.
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