- 您現(xiàn)在的位置：買(mǎi)賣(mài)IC網(wǎng) > PDF目錄359228 > MT3371BSR (ZARLINK SEMICONDUCTOR INC) Wide Dynamic Range DTMF Receiver PDF資料下載
參數(shù)資料
| 型號(hào)： | MT3371BSR |
| 廠商： | ZARLINK SEMICONDUCTOR INC |
| 元件分類(lèi)： | 信令電路 |
| 英文描述： | Wide Dynamic Range DTMF Receiver |
| 中文描述： | TELECOM, DTMF SIGNALING CIRCUIT, PDSO18 |
| 封裝： | 0.300 INCH, MS-013AB, SOIC-18 |
| 文件頁(yè)數(shù)： | 4/15頁(yè) |
| 文件大?。?/td> | 485K |
| 代理商： | MT3371BSR |
第1頁(yè)第2頁(yè)第3頁(yè)當(dāng)前第4頁(yè)第5頁(yè)第6頁(yè)第7頁(yè)第8頁(yè)第9頁(yè)第10頁(yè)第11頁(yè)第12頁(yè)第13頁(yè)第14頁(yè)第15頁(yè)
MT3170B/71B, MT3270B/71B, MT3370B/71B
Data Sheet
4
Zarlink Semiconductor Inc.
AGC is activated to prevent the input signal from being clipped. At low input level, the AGC remains inactive and the
input signal is passed directly to the hardware DTMF detection algorithm and to the energy detection circuit.
Filter and Decoder Section
The signal entering the DTMF detection circuitry is filtered by a notch filter at 350 and 440 Hz for dial tone rejection.
The composite dual-tone signal is further split into its individual high and low frequency components by two 6
th
order switched capacitor bandpass filters. The high group and low group tones are then smoothed by separate
output filters and squared by high gain limiting comparators. The resulting squarewave signals are applied to a
digital detection circuit where an averaging algorithm is employed to determine the valid DTMF signal. For
MT3x70B, upon recognition of a valid frequency from each tone group, the early steering (ESt) output will go high,
indicating that a DTMF tone has been detected. Any subsequent loss of DTMF signal condition will cause the ESt
pin to go low. For MT3x71B, an internal delayed steering counter validates the early steering signal after a
predetermined guard time which requires no external components. The delayed steering (DStD) will go high only
when the validation period has elapsed. Once the DStD output is high, the subsequent loss of early steering signal
due to DTMF signal dropout will activate the internal counter for a validation of tone absent guard time. The DStD
output will go low only after this validation period.
Energy Detection
The output signal from the AGC circuit is also applied to the energy detection circuit. The detection circuit consists
of a threshold comparator and an active integrator. When the signal level is above the threshold of the internal
comparator (-35dBm), the energy detector produces an energy present indication on the SD output. The integrator
ensures the SD output will remain at high even though the input signal is changing. When the input signal is
removed, the SD output will go low following the integrator decay time. Short decay time enables the signal
envelope (or cadence) to be generated at the SD output. An external microcontroller can monitor this output for
specific call progress signals. Since presence of speech and DTMF signals (above the threshold limit) can cause
the SD output to toggle, both ESt (DStD) and SD outputs should be monitored to ensure correct signal identification.
As the energy detector is multiplexed with the digital serial data output at the SD pin, the detector output is selected
at all times except during the time between the rising edge of the first pulse and the falling edge of the fourth pulse
applied at the ACK pin.
Serial Data (SD) Output
When a valid DTMF signal burst is present, ESt or DStD will go high. The application of four clock pulses on the
ACK pin will provide a 4-bit serial binary code representing the decoded DTMF digit on the SD pin output. The rising
edge of the first pulse applied on the ACK pin latches and shifts the least significant bit of the decoded digit on the
SD pin. The next three pulses on ACK pin will shift the remaining latched bits in a serial format (see Figure 5). If less
than four pulses are applied to the ACK pin, new data cannot be latched even though ESt/DStD can be valid. Clock
pulses should be applied to clock out any remaining data bits to resume normal operation. Any transitions in excess
of four pulses will be ignored until the next rising edge of the ESt/DStD. ACK should idle at logic low. The 4-bit
binary representing all 16 standard DTMF digits are shown in Table 1.
F
LOW
F
HIGH
DIGIT
b
3
b
2
b
1
b
0
697
1209
1
0
0
0
1
697
1336
2
0
0
1
0
697
1477
3
0
0
1
1
770
1209
4
0
1
0
0
770
1336
5
0
1
0
1
770
1477
6
0
1
1
0
852
1209
7
0
1
1
1
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| MT3371BS1 | Wide Dynamic Range DTMF Receiver |
| MT3371BS | Wide Dynamic Range DTMF Receiver |
| MT3371BN | Wide Dynamic Range DTMF Receiver |
| MT352 | COFDM Demodulator |
| MT352CG | COFDM Demodulator |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MT3371BSR1 | 制造商:Microsemi Corporation 功能描述:DTMF RX 4.19MHZ 5V 18SOIC - Tape and Reel |
| MT338024 | 功能描述:通用繼電器 Relays Power, Over 2 Amps - RELAY GP 3PDT 10A 24VAC LED RoHS:否 制造商:Omron Electronics 觸點(diǎn)形式:1 Form A (SPST-NO) 觸點(diǎn)電流額定值:150 A 線圈電壓:24 VDC 線圈電阻:144 Ohms 線圈電流:167 mA 切換電壓:400 V 安裝風(fēng)格:Chassis 觸點(diǎn)材料: |
| MT338115 | 制造商:TE Connectivity 功能描述:RELAY, MULTIMODE, 115 VAC, 3 CO CONTACTS, GOLD PLATED, 11 PIN, W/ LED AND TEST B |
| MT338230 | 制造商:MA-COM 制造商全稱(chēng):M/A-COM Technology Solutions, Inc. 功能描述:Multimode Relay |
| MT338W21-Q | 功能描述:電線鑒定 Marker Tag, 304 SS, 1 Hole, 3.38" (86mm) RoHS:否 制造商:TE Connectivity / Q-Cees 產(chǎn)品:Labels and Signs 類(lèi)型: 材料:Vinyl 顏色:Blue 寬度:0.625 in 長(zhǎng)度:1 in |
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。