參數(shù)資料
型號(hào)： MT3271BE1
廠商： ZARLINK SEMICONDUCTOR INC
元件分類： 信令電路
英文描述： Wide Dynamic Range DTMF Receiver
中文描述： TELECOM, DTMF SIGNALING CIRCUIT, PDIP8
封裝： LEAD FREE, PLASTIC, MS-001BA, DIP-8
文件頁(yè)數(shù)： 1/15頁(yè)
文件大?。?/td> 485K
代理商： MT3271BE1
1
Zarlink Semiconductor Inc.
Zarlink, ZL and the Zarlink Semiconductor logo are trademarks of Zarlink Semiconductor Inc.
Copyright 1995-2005, Zarlink Semiconductor Inc. All Rights Reserved.
Features
Wide dynamic range (50 dB) DTMF Receiver
Call progress (CP) detection via cadence
indication
4-bit synchronous serial data output
Software controlled guard time for MT3x70B
Internal guard time circuitry for MT3x71B
Powerdown option (MT317xB & MT337xB)
4.194304 MHz crystal or ceramic resonator
(MT337xB and MT327xB)
External clock input (MT317xB)
Guarantees non-detection of spurious tones
Applications
Integrated telephone answering machine
End-to-end signalling
Fax Machines
August 2005
Ordering Information
MT3170/71BE
MT3270/71BE
MT3370/71BS
MT3370/71BN
MT3370/71BSR
MT3371BNR
MT3270/71BE1
MT3171BE1
MT3170BE1
MT3370/BN1
MT3370/71BS1
MT3370/71BSR1
8 Pin PDIP
8 Pin PDIP
18 Pin SOIC
20 Pin SSOP
18 Pin SOIC
20 Pin SSOP
8 Pin PDIP*
8 Pin PDIP*
8 Pin PDIP**
20 Pin SSOP*
18 Pin SOIC*
18 Pin SOIC*
*Pb Free Matte Tin
**Pb Free Tin/Silver/Copper
Tubes
Tubes
Tubes
Tubes
Tape & Reel
Tape & Reel
Tubes
Tubes
Tubes
Tubes
Tubes
Tape & Reel
-40
°
C to 85
°
C
MT3170B/71B, MT3270B/71B, MT3370B/71B
Wide Dynamic Range DTMF Receiver
Data Sheet
Figure 1 - Functional Block Diagram
PWDN
VDD
VSS
INPUT
OSC2
OSC1
(CLK)
MT3170B/71B and MT337xB only.
MT3270B/71B and MT337xB only.
MT3x71B only.
Voltage
Bias Circuit
AGC
Anti-
alias
Filter
High
Group
Filter
Low
Group
Filter
Steering
Circuit
Digital
Detector
Algorithm
Code
Converter
and
Latch
Digital
Guard
Time
Parallel to
Serial
Converter
& Latch
Mux
Energy
Detection
Oscillator
and
Clock
Circuit
To All Chip Clocks
Dial
Tone
Filter
ESt
or
DStD
ACK
SD
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