參數(shù)資料
型號： MSP430F2370IYFFR
廠商： Texas Instruments
文件頁數(shù)： 56/65頁
文件大?。?/td> 0K
描述： IC MCU 16BIT 32K FLASH 49-DSBGA
產(chǎn)品培訓(xùn)模塊： The Ultra-Low Power MSP430
MSP430 Overview
MSP430 Design Tools
MSP430 Peripherals
Portable Medical Solutions with MSP430
MSP430 for Utility Metering Solutions
MSP430: How to JTAG
MSP430, How To Use the Clock System
Grace Software Graphical User Interface
MCU Overview
Driver Library
MSP430Ware Overview
標(biāo)準(zhǔn)包裝： 1
系列： MSP430F2xx
核心處理器： RISC
芯體尺寸： 16-位
速度： 16MHz
連通性： I²C，IrDA，LIN，SCI，SPI，UART/USART
外圍設(shè)備： 欠壓檢測/復(fù)位，POR，PWM，WDT
輸入/輸出數(shù)： 32
程序存儲器容量： 32KB（32K x 8 + 256B）
程序存儲器類型： 閃存
RAM 容量： 2K x 8
電壓 - 電源 (Vcc/Vdd)： 1.8 V ~ 3.6 V
數(shù)據(jù)轉(zhuǎn)換器： 斜率 A/D
振蕩器型： 內(nèi)部
工作溫度： -40°C ~ 85°C
封裝/外殼： 49-UFBGA，DSBGA
包裝： 標(biāo)準(zhǔn)包裝
產(chǎn)品目錄頁面： 712 (CN2011-ZH PDF)
配用： 296-23115-ND - TOOL FLASH EMU MSP430 40PIN RHA
其它名稱： 296-24336-6
MSP430F23x0
SLAS518E
– AUGUST 2006 – REVISED AUGUST 2011
Table 3. Terminal Functions
TERMINAL
DESCRIPTION
NAME
YFF
RHA
I/O
DVCC
B3
1
Digital supply voltage, positive terminal. Supplies all digital parts.
XIN/P2.6/CA6
A2
2
I/O
Input terminal of crystal oscillator/general-purpose digital I/O pin/Comparator_A input
XOUT/P2.7/CA7
A3
3
I/O
Output terminal of crystal oscillator/general-purpose digital I/O pin/Comparator_A input
P1.0/TACLK
B4
4
I/O
General-purpose digital I/O pin/Timer_A, clock signal TACLK input
P1.1/TA0
C4
5
I/O
General-purpose digital I/O pin/Timer_A, capture: CCI0A input, compare: Out0 output
P1.2/TA1
A5
6
I/O
General-purpose digital I/O pin/Timer_A, capture: CCI1A input, compare: Out1 output
P1.3/TA2
B5
7
I/O
General-purpose digital I/O pin/Timer_A, capture: CCI2A input, compare: Out2 output
P1.4/SMCLK
A6
8
I/O
General-purpose digital I/O pin/SMCLK signal output
P1.5/TA0
B6
9
I/O
General-purpose digital I/O pin/Timer_A, compare: Out0 output
P1.6/TA1
A7
10
I/O
General-purpose digital I/O pin/Timer_A, compare: Out1 output
P1.7/TA2
B7
11
I/O
General-purpose digital I/O pin/Timer_A, compare: Out2 output
P2.0/ACLK/CA2
C5
12
I/O
General-purpose digital I/O pin/ACLK output/Comparator_A input
P2.1/TAINCLK/CA3
C7
13
I/O
General-purpose digital I/O pin/Timer_A, clock signal at INCLK/Comparator_A input
General-purpose digital I/O pin/Comparator_A output/Timer_A, capture: CCI0B
P2.2/CAOUT/TA0/CA4
C6
14
I/O
input/Comparator_A input
P2.3/CA0/TA1
D7
15
I/O
General-purpose digital I/O pin/Comparator_A input/Timer_A, compare: Out1 output
P2.4/CA1/TA2
D6
16
I/O
General-purpose digital I/O pin/Comparator_A input/Timer_A, compare: Out2 output
General-purpose digital I/O pin/input for external resistor defining the DCO nominal
P2.5/ROSC/CA5
E7
17
I/O
frequency/Comparator_A input
P3.0/UCB0STE/
E6
18
I/O
General-purpose digital I/O pin/USCIB0 slave transmit enable/USCIA clock input/output
UCA0CLK
P3.1/UCB0SIMO/
General-purpose digital I/O pin/USCIB0 slave in/master out in SPI mode, SDA I2C data
F7
19
I/O
UCB0SDA
in I2C mode
P3.2/UCB0SOMI/
General-purpose digital I/O pin/USCIB0 slave out/master in in SPI mode, SCL I2C
F6
20
I/O
UCB0SCL
clock in I2C mode
P3.3/UCB0CLK/
G7
21
I/O
General-purpose digital I/O/USCIB0 clock input/output, USCIA0 slave transmit enable
UCA0STE
P3.4/UCA0TXD/
General-purpose digital I/O pin/USCIA0 transmit data output in UART mode, slave data
G6
22
I/O
UCA0SIMO
in/master out in SPI mode
P3.5/UCA0RXD/
General-purpose digital I/O pin/USCIA0 receive data input in UART mode, slave data
G5
23
I/O
UCA0SOMI
out/master in in SPI mode
P3.6
F5
24
I/O
General-purpose digital I/O pin
P3.7
G4
25
I/O
General-purpose digital I/O pin
P4.0/TB0
F4
26
I/O
General-purpose digital I/O pin/Timer_B, capture: CCI0A input, compare: Out0 output
P4.1/TB1
G3
27
I/O
General-purpose digital I/O pin/Timer_B, capture: CCI1A input, compare: Out1 output
P4.2/TB2
G2
28
I/O
General-purpose digital I/O pin/Timer_B, capture: CCI2A input, compare: Out2 output
P4.3/TB0
F3
29
I/O
General-purpose digital I/O pin/Timer_B, capture: CCI0B input, compare: Out0 output
P4.4/TB1
G1
30
I/O
General-purpose digital I/O pin/Timer_B, capture: CCI1B input, compare: Out1 output
P4.5/TB2
F1
31
I/O
General-purpose digital I/O pin/Timer_B, compare: Out2 output
General-purpose digital I/O pin/switch all PWM digital outputs to high impedance -
P4.6/TBOUTH/ACLK
F2
32
I/O
Timer_B3: TB0 to TB2/ACLK output
P4.7/TBCLK
E2
33
I/O
General-purpose digital I/O pin/input clock TBCLK - Timer_B3
TDO/TDI
E1
34
I/O
Test data output port. TDO/TDI data output or programming data input terminal
Test data input or test clock input. The device protection fuse is connected to
TDI/TCLK
D1
35
I
TDI/TCLK.
TMS
D2
36
I
Test mode select. TMS is used as an input port for device programming and test.
TCK
C1
37
I
Test clock. TCK is the clock input port for device programming and test.
RST/NMI
C2
38
I
Reset input, nonmaskable interrupt input port.
D/AVSS
B1
39
Digital/analog supply voltage, negative terminal
6
Copyright
2006–2011, Texas Instruments Incorporated
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