參數(shù)資料
型號(hào)： MSM63182A-XXX
廠商： LAPIS SEMICONDUCTOR CO LTD
元件分類(lèi)： 微控制器/微處理器
英文描述： 4-BIT, MROM, 2 MHz, MICROCONTROLLER, UUC107
封裝： 4.44 X 4.92 MM, 0.35 MM HEIGHT, DIE-107
文件頁(yè)數(shù)： 10/30頁(yè)
文件大?。?/td> 228K
代理商： MSM63182A-XXX
FEDL63182A-02
1Semiconductor
MSM63182A
17/29
ELECTRICAL CHARACTERISTICS
DC Characteristics
(V
SS = VDDI = 0.9 to 5.5 V, VSS = 0 V, Ta = –20 to +70°C unless otherwise specified)
Parameter
Symbol
Condition
Min.
Typ.
Max.
Unit
Mea-
suring
Circuit
V
DD2 Voltage
V
DD2
1/5 bias, 1/4 bias
(Ta = 25°C)
1.7
1.8
1.9
V
DD2 Voltage Temperature
Deviation
V
DD2
—
—–4
—
mV/°C
V
DD1 Voltage
V
DD1
1/5 bias, 1/4 bias
Typ. – 0.1 1/2
× V
DD2
Typ. + 0.1
V
1/5 bias
Typ. – 0.3 3/2
× V
DD2
Typ. + 0.3
V
DD3 Voltage
V
DD3
1/4 bias
(connect V
DD3 and VDD2)
Typ. – 0.2
V
DD2
Typ. + 0.2
V
1/5 bias
Typ. – 0.4
2
× V
DD2
Typ. + 0.4
V
DD4 Voltage
V
DD4
1/4 bias
Typ. – 0.3 3/2
× V
DD2
Typ. + 0.3
V
1/5 bias
Typ. – 0.5 5/2
× V
DD2
Typ. + 0.5
V
DD5 Voltage
V
DD5
1/4 bias
Typ. – 0.4
2
× V
DD2
Typ. + 0.4
V
High-speed clock
oscillation stopped
V
DD = 1.5 V
2.8
—
3.0
V
DDH Voltage
(Backup used)
V
DDH
High-speed clock oscillation
(Ceramic oscillation,
1 MHz VDD = 1.5 V)
2.0
—
2.7
V
High-speed clock
oscillation stopped
0.8
1.3
1.8
V
DDL Voltage
V
DDL
High-speed clock oscillation
(VDD = 1.2 to 5.5 V)
1.2
—
5.5
V
Crystal Oscillation Start
Voltage
V
STA
Oscillation start time:
within 5 seconds
1.0
—
V
Backup
0.9
—
V
Crystal Oscillation Hold
Voltage
V
HOLD
Backup not used
1.7
—
V
Crystal Oscillation Stop
Detect Time
T
STOP
—
0.1
—
5.0
ms
External Crystal Oscillator
Capacitance
C
G
—
5
—
25
pF
Internal Crystal Oscillator
Capacitance
C
D
—
20
25
30
pF
External Ceramic Oscillator
Capacitance
C
L0, 1
CSA2.00MG (Murata MFG.-
make) used VDD = 3.0 V
—30
—
pF
Internal RC Oscillator
Capacitance
C
OS
—
812
16
pF
V
DD = 1.5 V
0—
0.4
V
POR Voltage
V
POR1
V
DD = 3.0 V
0—
0.7
V
DD = 1.5 V
1.2
—
1.5
V
Non-POR Voltage
V
POR2
V
DD = 3.0 V
2.0
—
3.0
V
1
Notes: 1. “V
DD2” varies in the range of 1.8 to 2.4 V depending on the value of the display contrast
register (DSPCNT).
2. “T
STOP” indicates that if the crystal oscillator stops over the value of TSTOP, the system reset
occurs.
3. “POR” denotes Power On Reset.
4. “V
POR1” indicates that POR occurs when VDD falls from VDD to VPOR1 and again rises up to VDD.
5. “V
POR2” indicates that POR does not occur when VDD falls from VDD to VPOR2 and again rises up
to V
DD.
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