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參數(shù)資料
| 型號(hào)： | MSM6222 |
| 廠商： | OKI SEMICONDUCTOR CO., LTD. |
| 英文描述： | DOT MATRIX LCD CONTROLLER WITH 16-DOT COMMON DRIVER AND 40-DOT SEGMENT DRIVER |
| 中文描述： | 點(diǎn)陣LCD控制器的16交通部通用驅(qū)動(dòng)器和40段驅(qū)動(dòng)交通部 |
| 文件頁數(shù)： | 5/45頁 |
| 文件大小： | 390K |
| 代理商： | MSM6222 |
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MSM6222B-xx
Semiconductor
13/45
FUNCTIONAL DESCRIPTION
Instruction Register (IR) and Data Register (DR)
These two registers are selected by the REGISTER SELECTOR (RS) pin.
The DR is selected when the "H" level is input to the RS pin and IR is selected when the "L"
level is input.
The IR is used to store the address of the display data RAM (DD RAM) or character
generator RAM (CG RAM) and instruction code.
The IR can be written, but not be read by the microcomputer (CPU).
The DR is used to write and read the data to and from the DD RAM or CG RAM.
The data written to DR by the CPU is automatically written to the DD RAM or CG RAM
as an internal operation.
When an address code is written to IR, the data (of the specified address) is automatically
transferred from the DD RAM or CG RAM to the DR. Next, when the CPU reads the DR,
it is possible to verify DD RAM or CG RAM data from the DR data.
After the writing of DR by the CPU, the next adress in the DD RAM or CG RAM is selected
to be ready for the next CPU writing.
Likewise, after the reading out of DR by the CPU, DD RAM or CG RAM data is read out
by the DR to be ready for the next CPU reading.
Write/read to and from both registers is carried out by the READ/WRITE (R/W) pin.
Table 1 RS and R/W pins functions
Busy Flag (BF)
When the busy flag is at "H", it indicates that the MSM6222B-xx is engaged in internal
operation.
When the busy flag is at "H", any new instruction is ignored.
When R/W = "H" and RS = "L", the busy flag is output from DB7.
New instruction should be input when busy flag is "L" level.
When the busy flag is at "H", the output code of the address counter (ADC) is undefined.
Address Counter (ADC)
The address counter (ADC) allocates the address for the DD RAM and CG RAM write/read
and also for the cursor display.
When the instruction code for a DD RAM address or CG RAM address setting is input to IR,
after deciding whether it is DD RAM or CG RAM, the address code is transferred from IR
to ADC. After writing (reading) the display data to (from) the DD RAM or CG RAM, the
ADC is incremented (decremented) by 1 internally.
The data of the ADC is output to DB0 - DB6 on the conditions that R/W = "H", RS = "L", and
BF = "L".
L
RS
Function
R/W
L
IR write
H
L
Read of busy flag (BF) and address counter (ADC)
L
H
DR write
H
DR read
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MSM6222B | 制造商:OKI 制造商全稱:OKI electronic componets 功能描述:DOT MATRIX LCD CONTROLLER WITH 16-DOT COMMON DRIVER AND 40-DOT SEGMENT DRIVER |
| MSM6222B-01 | 制造商:OKI 制造商全稱:OKI electronic componets 功能描述:DOT MATRIX LCD CONTROLLER WITH 16 DOT COMMON DRIVER AND 40 DOT SEGMENT DRTVER |
| MSM6222B-01GS-BL | 制造商:ROHM Semiconductor 功能描述: |
| MSM6222B-XX | 制造商:OKI 制造商全稱:OKI electronic componets 功能描述:DOT MATRIX LCD CONTROLLER WITH 16-DOT COMMON DRIVER AND 40-DOT SEGMENT DRIVER |
| MSM-6226 | 制造商:ICP DAS USA, IN 功能描述:24-Port L2 Plus Managed Fast Ethernet Switch + 2 TP/SFP Giga |
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