
Semiconductor
MSM54C865
1/44
DESCRIPTION
The MSM54C865 is a 512Kbit CMOS multiport DRAM composed of a 65,536-word by 8-bit
dynamic RAM and a 256-word by 8-bit SAM. Its RAM and SAM operate independently and
asynchronously.
The MSM54C865 supports three types of operaton: random access to RAM port, high speed serial
access to SAM port and bidirectional transfer of data between any selected row in the RAM port
and the SAM port. In addition to the conventional multiport DRAM operating modes, the
MSM54C865 features the block write and flash write functions on the RAM port and a split data
transfer capability on the SAM port. The SAM port requires no refresh operation because it uses
static CMOS flip-flops.
FEATURES
Single power supply: 5 V
±
10%
Full TTL compatibility
Multiport organization
RAM: 64K word
¥
8 bits
SAM : 256 word
¥
8 bits
Fast page mode
Write per bit
Masked flash write
Masked block write
RAS
only refresh
CAS
before
RAS
refresh
Hidden refresh
Serial read/write
256 tap location
Bidirectional data transfer
Split transfer
Masked write transfer
Refresh :256 cycles/4 ms
Package options:
40-pin 475 mil plastic ZIP
40-pin 400 mil plastic SOJ
(ZIP40-P-475-1.27)
(SOJ40-P-400-1.27)
(Product : MSM54C865-xxZS)
(Product : MSM54C865-xxJS)
xx indicates speed rank.
PRODUCT FAMILY
65,536-Word
¥
8-Bit Multiport DRAM
Family
MSM54C865-70
MSM54C865-80
MSM54C865-10
Access Time
RAM
70 ns
80 ns
100 ns
SAM
25 ns
25 ns
25 ns
Cycle Time
RAM
140 ns
150 ns
180 ns
SAM
30 ns
30 ns
30 ns
Power Dissipation
Operating
120 mA
110 mA
100 mA
Standby
8 mA
8 mA
8 mA
E2L0011-17-Y1
This version: Jan. 1998
Previous version: Dec. 1996