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參數(shù)資料
| 型號(hào)： | MSM51V4221C-40RD |
| 廠商： | OKI SEMICONDUCTOR CO., LTD. |
| 英文描述： | 262,263-Word 】 4-Bit Field Memory |
| 中文描述： | 262263詞】4位場(chǎng)記憶 |
| 文件頁(yè)數(shù)： | 1/16頁(yè) |
| 文件大?。?/td> | 238K |
| 代理商： | MSM51V4221C-40RD |
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FEDS51V4221C-03
1
Semiconductor
MSM51V4221C
262,263-Word
×
4-Bit Field Memory
This version: Oct. 2000
Previous version: Feb. 2000
1/16
GENERAL DESCRIPTION
The OKI MSM51V4221C is a high performance 1-Mbit, 256K
×
4-bit, Field Memory. It is designed for high-
speed serial access applications such as HDTVs, conventional NTSC TVs, VTRs, digital movies and Multi-media
systems. It is a FRAM for wide or low end use as general commodity TVs and VTRs, exclusively. The
MSM51V4221C is not designed for the other use or high end use in medical systems, professional graphics
systems which require long term picture, and data storage systems and others. The 1-Mbit capacity fits one field of
a conventional NTSC TV screen.
Each of the 4-bit planes has separate serial write and read ports. These employ independent control clocks to
support asynchronous read and write operations. Different clock rates are also supported that allow alternate data
rates between write and read data streams.
The MSM51V4221C provides high speed FIFO, First-In First-Out, operation without external refreshing: it
refreshes its DRAM storage cells automatically, so that it appears fully static to the users.
Moreover, fully static type memory cells and decoders for serial access enable refresh free serial access operation,
so that the serial read and/or write control clock can be halted high or low for any duration as long as the power is
on. Internal conflicts of memory access and refreshing operations are prevented by special arbitration logic.
The MSM51V4221B’s function is simple, and similar to a digital delay device whose delay-bit-length is easily set
by reset timing. The delay length, number of read delay clocks between write and read, is determined by externally
controlled write and read reset timings.
Additional SRAM serial registers, or line buffers for the initial access of 256
×
4-bit enable high speed first-bit-
access with no clock delay just after the write or read reset timings.
The MSM51V4221C is similar in operation and functionality to OKI 2-Mbit Field Memory MSM51V8221A.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| MSM51V4221C-30JA | 262,263-Word 】 4-Bit Field Memory |
| MSM51V4221C-30RA | 262,263-Word 】 4-Bit Field Memory |
| MSM51V4221C-30RD | 262,263-Word 】 4-Bit Field Memory |
| MSM51V4221C | 262,263-Word×4-Bit Field Memory(262,263字×4位場(chǎng)存儲(chǔ)器) |
| MSM51V4222C | 262,263-Word 】 4-Bit Field Memory |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MSM51V4222C | 制造商:OKI 制造商全稱(chēng):OKI electronic componets 功能描述:262,263-Word 】 4-Bit Field Memory |
| MSM51V4222C-30JA | 制造商:OKI 制造商全稱(chēng):OKI electronic componets 功能描述:262,263-Word 】 4-Bit Field Memory |
| MSM51V4222C-30RA | 制造商:OKI 制造商全稱(chēng):OKI electronic componets 功能描述:262,263-Word 】 4-Bit Field Memory |
| MSM51V4222C-30RD | 制造商:OKI 制造商全稱(chēng):OKI electronic componets 功能描述:262,263-Word 】 4-Bit Field Memory |
| MSM51V4222C-40JA | 制造商:OKI 制造商全稱(chēng):OKI electronic componets 功能描述:262,263-Word 】 4-Bit Field Memory |
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