
VCC -
is the low voltage supply for all the internal logic and
drivers. A 0.1uF ceramic capacitor in parallel with a 10uF
tantalum capacitor is recommended bypassing for the VCC-
VSS pins.
VSS -
is the low voltage supply return pin and the input logic
return reference. All logic input and logic output is referenced
to this pin. This pin can vary ± 5V from the AV-,BV-,CV-/
ISENSE power return pin without affecting any of the logic
functions.
AHIN, BHIN, CHIN -
are low active logic inputs for signal-
ling the corresponding phase high-side switch to turn on. The
input levels are 5V
CMOS
or
TTL
compatible. Typical propa-
gation delays are around 600nS.
ALIN, BLIN, CLIN -
are low active inputs for signalling
the corresponding phase low-side switch to turn on. The in-
put levels are 5V
CMOS
or
TTL
compatible. Typical propaga-
tion delays are around 600nS.
ITRIP - i
s an analog input pin for sensing current flowing from
the AV-,BV-,CV-/ISENSE
pin through a sense resistor to the
high power ground. A 0.485 volt level at this pin with re-
spect to
VSS
will signal an overcurrent condition and shut
down all output switching. Bringing the voltage below this
point (100 mV hysteresis) will remove the shutdown condi-
tion, and leaving the low-side logic inputs simultaneously high
(de-activated) for 10uS will restore normal operation.
AV+,BV+,CV+ -
are the connections from the tops of the
three half bridges to the high voltage positive rail. Connec-
tions must be made individually from each pin to the rail, with
enough current-handling capability for the load. Proper power
supply bypassing must be connected to these three pins and
the Vss connections for proper filtering. This bypassing must
be done as close to the hybrid as possible.
AV-,BV-
- are the connections from the bottoms of the A
and B half bridges to the return of the high voltage negative
rail. These pins should be tied to the CV-/ISENSE with as
short a connection as possible.
CV-/ISENSE
- is the connection from the bottom of the C
half bridge to the return of the high voltage negative rail. There
should be a connection to AV- and BV- here. If there is cur-
rent sensing, then a sense resistor should go between this
point and the return of the high voltage supply. If no sensing
is desired, then this point should connect to Vss, the negative
rail of the high voltage supply and any high voltage bypass
capacitance.
A, B, C -
are the pins connecting the 3 phase bridge
switch outputs.
APPLICATION NOTES
PROTECTION
MSK4357 PIN DESCRIPTION
All logic inputs use a 300nS filter. A pulse width below this
will get ignored.
VCC
voltage below the cutoff level of 8.65 volts will reset all
switch outputs off and ignore subsequent logic inputs until
VCC
is restored.
Undervoltage lockout of the internal drivers for the high-side
switches also occurs at 8.65 volts. This may occur if the
high-side output gets switched at greater than 25 kHZ with-
out switching the low-side. The internal power supply for the
high-side switch will sag too low for adequate switching. Ei-
ther slow down the
PWM
rate or
PWM
the low-side switches
instead.
Switching a low-side logic input while the corresponding phase
high-side logic input is activated will turn off both switches.
The opposite condition is also true. This is cross-conduction
lockout and will occur any time low and high-side inputs for a
phase are activated at the same time.
A 2uS deadtime is automatically inserted between high and
low-side output switching to allow complete turn-off of each
switch so no overlap will occur.
An overcurrent condition detected by the
ITRIP
pin will shut
down all output switches until the overcurrent condition is
removed and all three low-side logic inputs are held high for
10uS, then normal operation will resume.
ITRIP
has a 400nS leading edge blanking time after switching
to ignore any switching current transients.
TYPICAL OPERATION
-
-
-
-
-
-
-
PRELIMINARY Rev. D 11/00
3
EXAMPLE:
FOR 20 AMP LIMIT:
R-SENSE = 0.050 OHMS
R-SENSE VOLT = 1 VOLT
R1 = 51.5 OHMS
R2 = 48.5 OHMS
FIGURE 1
GROUNDING, BYPASSING, CURRENT SENSE