參數(shù)資料
型號(hào): MSK3554
廠商: Electronic Theatre Controls, Inc.
英文描述: HIGH SPEED, WIDEBAND OPERATIONAL AMPLIFIER
中文描述: 高速,寬帶運(yùn)算放大器
文件頁數(shù): 3/5頁
文件大?。?/td> 270K
代理商: MSK3554
APPLICATION NOTES
HEAT SINKING
Refer to the following thermal model and governing equa-
tions to determine appropriate heat sinking for your application.
Example:
This example demonstrates a worst case analysis for the op-
amp output stage. This occurs when the output voltage is 1/2
the power supply voltage. Under this condition, maximum power
transfer occurs and the output is under maximum stress.
Conditions:
V
CC
= ±16VDC
V
O
= ±8Vp Sine Wave, Freq. = 1KHZ
R
L
= 100
Governing Equation:
T
J
=P
D
x (R
θ
JC
+ R
θ
CS
+ R
θ
SA
) + T
A
Where
T
J
= Junction Temperature
P
D
= Total Power Dissipation
R
θ
JC
= Junction to Case Thermal Resistance
R
θ
CS
= Case to Heat Sink Thermal Resistance
R
θ
SA
= Heat Sink to Ambient Thermal Resistance
T
C
= Case Temperature
T
A
= Ambient Temperature
T
S
= Sink Temperature
For a worst case analysis we will treat the +8Vp sine wave
as an 8 VDC output voltage.
1.) Find Driver Power Dissipation
P
D
= (V
CC
-V
O
) (V
O
/R
L
)
= (16V-8V) (8V/100
)
= .64W
2.) For conservative design, set T
J
=+125°C
3.) For this example, worst case T
A
=+90°C
4.) R
θ
JC
= 37°C/W from MSK 3554B Data Sheet
5.) R
θ
CS
= 0.15°C/W for most thermal greases
6.) Rearrange governing equation to solve for R
θ
SA
R
θ
SA
= ((T
J
- T
A
)/P
D
) - (R
θ
JC
) - (R
θ
CS
)
= ((125°C - 90°C) / .64W) - 37°C/W - .15°C/W
= 54.7 - 37.15
= 17.54°C/W
The heat sink in this example must have a thermal resistance
of no more than 17.54°C/W to maintain a junction temperature
of no more than +125°C.
OFFSET NULL
Typically, the MSK 3554(B) has an input offset voltage of
less than ±0.5mV. If it is desirable to adjust the offset closer
to "zero", or to a value other than "zero", the circuit below is
recommended. Rp should be a ten-turn 20K
potentiometer.
Typical offset adjust is ±20mV.
Thermal Model:
GAIN
-1
-10
-100
follower
Rfb
5.6K
5.6K
10K
0
Cfb
2.0pF
1.2pF
0.0pF
0pF
Ccomp
10pF
10pF
0.0pF
12pF
Rin
5.6K
560
100
0
COMPONENT SELECTION TABLE
COMPENSATION
The compensation capacitor is connected between pins 1
and 3 and is used to optimize bandwidth and slew rate while
maintaining circuit stability. The effect of compensation ca-
pacitance can be seen in the Bode Plot under the Typical Perfor-
mance Curves. As closed loop gain increases, compensation
capacitance can decrease and higher slew rates and wider band-
widths will be realized. See the component selection table for
recommended values of input and feedback resistance as well
as feedback capacitance and compensation capacitance.
3
Rev. B 7/00
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