
MRFIC1501
4
MOTOROLA RF DEVICE DATA
1800
1600
1400
f, FREQUENCY (MHz)
1200
TYPICAL CHARACTERISTICS
Figure 8. Noise Figure versus Frequency
2000
1000
2.5
1.7
0.9
0.5
Figure 9. Gain versus ENABLE Voltage
ENABLE (VOLTS)
N
S
5
3
2
1
0
20
10
– 5
– 30
TA = 25
°
C
ENABLE = VDD
VDD = 5 V
3 V
1500
1300
1100
1700
1900
2.1
1.3
15
5
–10
–15
0
– 25
– 20
4
TA = 25
°
C
VDD = 5 V
f = 1575 MHz
APPLICATIONS INFORMATION
DESIGN CONSIDERATIONS
The circuit configuration employs a DC cascode arrange-
ment which allows current sharing between two FETs. This
gives excellent noise figure at reduced supply current. Since
GPS applications often require the downconverter to be re-
motely mounted at the antenna, the output is DC coupled so
that the drain voltage can be supplied through the coax feed.
The VDD pin can actually supply other components in the
equipment at less than 20 mA of current. On–chip bias cir-
cuitry tracks changes in device threshold voltage and tem-
perature and is externally controlled through the ENABLE
pin. This feature allows for a low current standby mode or for
gain reduction. Refer to Figure 9 for control characteristics.
CIRCUIT CONSIDERATIONS
As shown in Figure 1, impedance matching of the
MRFIC1501 is quite simple. Through use of an on–chip
source inductor in the first stage,
Γ
opt and and
Γ
in* are
approximately equal. A single inductor at the input will give
good input match and noise figure. This inductor can be im-
plemented with a high impedance microstrip line or a chip in-
ductor.
As with all RF active circuit designs, bypassing the supply
pin is recommended. Layout and ground via location is im-
portant. Vias should be located as close as possible to
ground pins and the ground side of off–chip components.
EVALUATION BOARDS
Evaluation boards are available for RF Monolithic Inte-
grated Circuits by adding a “TF” to the device type. For a
complete list of currently available boards and ones in devel-
opment for newly introduced products, please consult your
local Motorola Distributor or Sales Office.