- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄383639 > MRF24J40-I (Microchip Technology Inc.) IEEE 802.15.4⑩ 2.4 GHz RF Transceiver PDF資料下載
參數(shù)資料
| 型號： | MRF24J40-I |
| 廠商： | Microchip Technology Inc. |
| 英文描述： | IEEE 802.15.4⑩ 2.4 GHz RF Transceiver |
| 中文描述： | IEEE 802.15.4標準⑩2.4 GHz射頻收發(fā)器 |
| 文件頁數(shù)： | 28/66頁 |
| 文件大小： | 748K |
| 代理商： | MRF24J40-I |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁當前第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁
MRF24J40
DS39776A-page 26
Advance Information
2006 Microchip Technology Inc.
6.4.3
LONG ADDRESSES
Every device in the world has a unique long address.
Long addresses are described in more detail in
Section 5.2.5 “Destination Address Information”
and
Section 5.2.6 “Source Address Information”
.
EADR0-EADR7 are eight short RAM address registers
in the MRF24J40 that are used to define the device’s
long address. These addresses should be loaded into
the device during the device configuration. The
MRF24J40 will automatically filter out any long address
packets that do not match the contents of
EADR0-EADR7.
6.4.4
SHORT ADDRESS AND PAN ID
The device’s short address and PAN ID are programmed
into the MRF24J40 through the SADRL, SADRH,
PANIDL and PANIDH registers. These registers are
located in the short RAM address space. The
MRF24J40 automatically filters out packets that are
specified as short address destinations with addresses
that do not match these registers. The exception to this
rule is packets with the broadcast short address (FFFFh)
and/or the broadcast PAN ID (FFFFh). Packets that
match the short address and have the broadcast PAN ID
will be accepted, as well as packets with the broadcast
short address that match the PAN ID. A true broadcast
packet will have both the short address and PAN ID set
to the broadcast address. The MRF24J40 will also
receive these packets no matter what the setting of the
short address and PAN ID registers.
Example 6-1 shows how to initialize the MRF24J40.
REGISTER 6-11:
PANIDL: MAC PAN LOW BYTE REGISTER
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
MAC PAN Low Byte (PANL<7:0>)
bit 7
bit 0
Legend:
R = Readable bit
-n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
x = Bit is unknown
bit 7-0
PANL7:PANL0:
Lower Byte of PAN Address bits
REGISTER 6-12:
PANIDH: MAC PAN HIGH BYTE REGISTER
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
MAC PAN High Byte (PANH<15:8>)
bit 7
bit 0
Legend:
R = Readable bit
-n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
x = Bit is unknown
bit 7-0
PANH15:PANH8:
Higher Byte of PAN Address bits
相關PDF資料 |
PDF描述 |
|---|---|
| MRF24J40-IMM | IEEE 802.15.4⑩ 2.4 GHz RF Transceiver |
| MRSM75 | Rotation detection MR sensor |
| MRUS51S | Micro power Built-in IC ultra-minimum MR sensor |
| MS-012AA | SOIC: 8−LEAD (POWER ICS ONLY) |
| MS1022 | PNP RF Amplifier Transistor Surface Mount |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| MRF24J40-I/ML | 功能描述:射頻收發(fā)器 2.4 Ghz IEEE/ZigBee RoHS:否 制造商:Atmel 頻率范圍:2322 MHz to 2527 MHz 最大數(shù)據(jù)速率:2000 Kbps 調(diào)制格式:OQPSK 輸出功率:4 dBm 類型: 工作電源電壓:1.8 V to 3.6 V 最大工作溫度:+ 85 C 接口類型:SPI 封裝 / 箱體:QFN-32 封裝:Tray |
| MRF24J40-I/ML | 制造商:Microchip Technology Inc 功能描述:ZIGBEE Transceiver IC |
| MRF24J40-I/T | 制造商:MICROCHIP 制造商全稱:Microchip Technology 功能描述:IEEE 802.15.4? 2.4 GHz RF Transceiver |
| MRF24J40-IMM | 制造商:MICROCHIP 制造商全稱:Microchip Technology 功能描述:IEEE 802.15.4⑩ 2.4 GHz RF Transceiver |
| MRF24J40MA | 制造商:Microchip Technology Inc 功能描述:WIRELESS TRANCEIVER MODULE, Supply Voltage Min:2.4V, Supply Voltage Max:3.6V, MS |
發(fā)布緊急采購，3分鐘左右您將得到回復。