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    參數(shù)資料
    型號(hào): MR80C52EXXX-25/883
    廠商: ATMEL CORP
    元件分類: 微控制器/微處理器
    英文描述: 8-BIT, MROM, 25 MHz, MICROCONTROLLER, CQCC44
    封裝: LCC-44
    文件頁(yè)數(shù): 26/46頁(yè)
    文件大小: 4720K
    代理商: MR80C52EXXX-25/883
    31
    ATtiny20 [DATASHEET]
    8235E–AVR–03/2013
    The BOD circuit will only detect a drop in VCC if the voltage stays below the trigger level for longer than tBOD given in
    Figure 8-6.
    Brown-out Reset During Operation
    8.3
    Internal Voltage Reference
    ATtiny20 features an internal bandgap reference. This reference is used for Brown-out Detection, and it can be used as
    an input to the Analog Comparator or the ADC. The bandgap voltage varies with supply voltage and temperature.
    8.3.1
    Voltage Reference Enable Signals and Start-up Time
    The voltage reference has a start-up time that may influence the way it should be used. The start-up time is given in
    “System and Reset Characteristics” on page 170. To save power, the reference is not always turned on. The reference is
    on during the following situations:
    1.
    When the BOD is enabled (by programming the BODLEVEL[2:0] Fuse).
    2.
    When the internal reference is connected to the Analog Comparator (by setting the ACBG bit in ACSR).
    3.
    When the ADC is enabled.
    Thus, when the BOD is not enabled, after setting the ACBG bit or enabling the ADC, the user must always allow the
    reference to start up before the output from the Analog Comparator or ADC is used. To reduce power consumption in
    Power-down mode, the user can avoid the three conditions above to ensure that the reference is turned off before
    entering Power-down mode.
    8.4
    Watchdog Timer
    The Watchdog Timer is clocked from an on-chip oscillator, which runs at 128 kHz. See Figure 8-7 on page 32. By
    controlling the Watchdog Timer prescaler, the Watchdog Reset interval can be adjusted as shown in Table 8-2 on page
    34. The WDR – Watchdog Reset – instruction resets the Watchdog Timer. The Watchdog Timer is also reset when it is
    disabled and when a device reset occurs. Ten different clock cycle periods can be selected to determine the reset period.
    If the reset period expires without another Watchdog Reset, the ATtiny20 resets and executes from the Reset Vector. For
    timing details on the Watchdog Reset, refer to Table 8-3 on page 34.
    VCC
    RESET
    TIME-OUT
    INTERNAL
    RESET
    VBOT-
    VBOT+
    tTOUT
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