參數(shù)資料
型號(hào): MR80C52CXXX-25SB
廠商: TEMIC SEMICONDUCTORS
元件分類: 微控制器/微處理器
英文描述: 8-BIT, MROM, 25 MHz, MICROCONTROLLER, CQCC44
文件頁(yè)數(shù): 9/60頁(yè)
文件大?。?/td> 5137K
代理商: MR80C52CXXX-25SB
17
8266D-MCU Wireless-06/12
ATmega128RFA1
Assembly Code Example
; note: will enter sleep before any pending
; interrupt(s)
C Code Example
__enable_interrupt(); /* set Global Interrupt Enable */
__sleep(); /* enter sleep, waiting for interrupt */
/* note: will enter sleep before any pending interrupt(s) */
7.8.1 Interrupt Response Time
The interrupt execution response for all the enabled AVR interrupts is five clock cycles
minimum. After five clock cycles the program vector address for the actual interrupt
handling routine is executed. During these five clock cycle period, the Program Counter
is pushed onto the Stack. The vector is normally a jump to the interrupt routine, and this
jump takes three clock cycles. If an interrupt occurs during execution of a multi-cycle
instruction, this instruction is completed before the interrupt is served. If an interrupt
occurs when the MCU is in sleep mode, the interrupt execution response time is
increased by five clock cycles. This increase comes in addition to the start-up time from
the selected sleep mode.
A return from an interrupt handling routine takes five clock cycles. During these five
clock cycles, the Program Counter (three bytes) is popped back from the Stack, the
Stack Pointer is incremented by three, and the I-bit in SREG is set.
相關(guān)PDF資料
PDF描述
MR80C52UXXX-25 8-BIT, MROM, 25 MHz, MICROCONTROLLER, CQCC44
IS80C32U-S 8-BIT, 20 MHz, MICROCONTROLLER, PQCC44
IV80C52UXXX-S 8-BIT, MROM, 20 MHz, MICROCONTROLLER, PQFP44
IS80C52UFXXX-S:R 8-BIT, MROM, 20 MHz, MICROCONTROLLER, PQCC44
IS80C52UXXX-25:R 8-BIT, MROM, 25 MHz, MICROCONTROLLER, PQCC44
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