參數(shù)資料
型號: MQ80C52TXXX-30SBR
廠商: ATMEL CORP
元件分類: 微控制器/微處理器
英文描述: 8-BIT, MROM, 30 MHz, MICROCONTROLLER, CQFP44
封裝: CERAMIC, QFP-44
文件頁數(shù): 61/132頁
文件大?。?/td> 10886K
代理商: MQ80C52TXXX-30SBR
266
8151H–AVR–02/11
ATmega128A
Table 24-5.
Boundary-scan Signals for the ADC
Signal
Name
Direction
as Seen
from the
ADC
Description
Recommen-
ded Input
when not
in Use
Output Values when
Recommended Inputs
are Used, and CPU is
not Using the ADC
COMP
Output
Comparator Output
0
ACLK
Input
Clock signal to gain
stages implemented as
Switch-cap filters
00
ACTEN
Input
Enable path from gain
stages to the comparator
00
ADCBGEN
Input
Enable Band-gap
reference as negative
input to comparator
00
ADCEN
Input
Power-on signal to the
ADC
00
AMPEN
Input
Power-on signal to the
gain stages
00
DAC_9
Input
Bit 9 of digital value to
DAC
11
DAC_8
Input
Bit 8 of digital value to
DAC
00
DAC_7
Input
Bit 7 of digital value to
DAC
00
DAC_6
Input
Bit 6 of digital value to
DAC
00
DAC_5
Input
Bit 5 of digital value to
DAC
00
DAC_4
Input
Bit 4 of digital value to
DAC
00
DAC_3
Input
Bit 3 of digital value to
DAC
00
DAC_2
Input
Bit 2 of digital value to
DAC
00
DAC_1
Input
Bit 1 of digital value to
DAC
00
DAC_0
Input
Bit 0 of digital value to
DAC
00
EXTCH
Input
Connect ADC channels 0
- 3 to by-pass path
around gain stages
11
G10
Input
Enable 10x gain
0
G20
Input
Enable 20x gain
0
GNDEN
Input
Ground the negative
input to comparator
when true
00
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