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參數(shù)資料
| 型號： | MQ80C52CXXX-20/883R |
| 廠商： | ATMEL CORP |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, MROM, 20 MHz, MICROCONTROLLER, CQFP44 |
| 封裝： | CERAMIC, QFP-44 |
| 文件頁數(shù)： | 23/101頁 |
| 文件大?。?/td> | 3398K |
| 代理商： | MQ80C52CXXX-20/883R |
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51
8168C-MCU Wireless-02/10
AT86RF212
Table 5-11. Configuration of Promiscuous Mode
Register
Address
Register
Bit
Name
Description
0x20,0x21
0x22,0x23
0x24
…
0x2B
SHORT_ADDR_0/1
PAN_ADDR_0/1
IEEE_ADDR_0
…
IEEE_ADDR_7
Each address shall be set to 0x00
0x17
1
AACK_PROM_MODE
1: Enable promiscuous mode
0x2E
4
AACK_DIS_ACK
1: Disable acknowledgment generation
To signal the availability of frame data, an IRQ_3 (TRX_END) is issued, even if the FCS
is invalid. Thus, it is necessary to read register bit RX_CRC_VALID (register 0x06,
PHY_RSSI) after IRQ_3 (TRX_END) in order to verify the reception of a frame with a
valid FCS. Alternatively, bit 7 of byte RX_STATUS can be evaluated, refer to section
If a device, operating in promiscuous mode, received a frame with a valid FCS that
furthermore passed the third level of filtering (according to IEEE 802.15.4-2006, section
7.5.6.2), an acknowledgement (ACK) frame would be transmitted. But, according to the
definition of the promiscuous mode, a received frame shall not be acknowledged, even
if requested. Thus, register bit AACK_DIS_ACK (register 0x2E, CSMA_SEED_1) must
be set to 1 to disable ACK generation.
In all receive modes, interrupt IRQ_5 (AMI) is issued if the received frame matches the
node’s address according to the filter rules described in section 6.2.
Promiscuous mode could also be implemented using state RX_ON (Basic Operating
Mode), refer to section 5.1. However, the RX_AACK transaction additionally enables
extended functionality like automatic acknowledgement and non-destructive frame
filtering.
5.2.3.3 Configuration of Non IEEE Compliant Scenarios
Reserved Frame Types
2) can also be handled. This might be required when implementing proprietary, non-
standard compliant protocols. The reception of reserved frame types is an extension of
the AT86RF212 Frame Filter, see section 6.2. Received frames are either handled like
data frames, or may be allowed to completely bypass the Frame Filter. The flow chart in
Figure 5-9 shows the corresponding state machine.
configuration registers required to setup a node to receive reserved frame types.
Table 5-12. RX_AACK Configuration to Receive Reserved Frame Types
Register
Address
Register
Bit
Name
Description
0x17
4
AACK_UPLD_RES_FT
1: Enable reserved frame type reception
0x17
5
AACK_FLTR_RES_FT
Filter reserved frame types like data frame
type
0: Disable
1: Enable
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